SBOA539 January   2023 INA219 , INA232

 

  1.   Abstract
  2.   Trademarks
  3. 1Overview
    1. 1.1 INA232 and INA219
  4. 2Migrating From INA219 to INA232
    1. 2.1 Package Selection and Pinout
    2. 2.2 Device Address
    3. 2.3 Shunt Voltage Range
    4. 2.4 Power Supply and IO Voltage Levels
    5. 2.5 Digital Interface and Data Format
    6. 2.6 Register Set
    7. 2.7 Accuracy
    8. 2.8 Unique Features
  5. 3Implementation
    1. 3.1 Identify Suitable Migration Projects
    2. 3.2 Bench Setup and Hardware
    3. 3.3 Result Registers and Calculation
    4. 3.4 Software Implementation

3.2 Bench Setup and Hardware

Figure 3-2 shows the DUT boards used. The U1 footprint is populated with either INA232 (left) or INA219 (right). SW0 is a 4-position switch connected to the A0 pin in this experiment, and is used to select one of four device addressed. Address A1 (pin #8) of INA219 is connected to ground.

Figure 3-2 DUT Boards

Figure 3-3 shows the bench setup block diagram. Shunt and bus voltages are provided by voltage sources. Communication between the DUTs and the microcontroller is through the I2C bus.

Figure 3-3 Bench Setup

Table 3-1 shows the bench setup parameters. Common design parameters are shared between the two devices. Columns INA219 and INA232 show device-specific settings, including Configuration and Calibration register values. These values are obtained based on the design parameters, as well as to keep the total ADC conversion cycle time closely matched.

Table 3-1 Bench and Device Settings
Setting INA219 INA232
Power supply (VS) 3.3 V
Bus (VCM) 12 V
PGA/ADC_range (Vsense_max) 80 mV
RSHUNT 2 mΩ
Current LSB 1 mA
Device address 40h
Averaging N/A 64
Bus conversion time 68.10 ms 1.1 ms
Shunt conversion time 68.10 ms 1.1 ms
ADC mode Shunt and bus, continuous
Configuration register value 2FFFh 4727h
Calibration register value 5000h 0A00h