at TA = +25°C, VS = ±15V, VREF = 0V, G = 1, RL = 10kΩ, and VCM = VS / 2, all chips site origins (CSO) (unless otherwise noted)
Figure 5-1 Gain vs Frequency
Figure 5-3 Common-Mode Rejection vs Frequency
Figure 5-5 Positive Power Supply Rejection vs Frequency
Figure 5-7 Negative Power Supply Rejection vs Frequency
Figure 5-9 Input Common-Mode Range vs Output Voltage
Figure 5-11 Crosstalk vs Frequency
Figure 5-13 Input-Referred Voltage Noise vs Frequency
Figure 5-15 Settling Time vs Gain
Figure 5-17 Input Overvoltage V/I Characteristics
Figure 5-19 Offset Voltage Warm-Up
Figure 5-21 Input Bias Current vs Temperature
Figure 5-23 Output Voltage Swing vs Output Current
Figure 5-25 Negative Output Voltage Swing vs Output Current
Figure 5-27 Short-Circuit Output Current vs Temperature
Figure 5-29 Maximum Output Voltage vs Frequency
Figure 5-31 Total Harmonic Distortion + Noise vs Frequency
Figure 5-33 Small-Signal Step Response
| CSO: TID | G = 1000, RL = 10kΩ, CL = 100pF |
Figure 5-35 Small-Signal Step Response
Figure 5-37 Large-Signal Step Response
Figure 5-39 Large-Signal Step Response
Figure 5-41 Voltage Noise 0.1Hz to 10Hz Input-referred
Figure 5-2 Gain vs Frequency
Figure 5-4 Common-Mode Rejection vs Frequency
Figure 5-6 Positive Power Supply Rejection vs Frequency
Figure 5-8 Negative Power Supply Rejection vs Frequency
Figure 5-10 Input Common-Mode Range vs Output Voltage
Figure 5-12 Input-Referred Noise vs Frequency
Figure 5-14 Input-Referred Current Noise vs Frequency
Figure 5-16 Quiescent Current and Slew Rate vs Temperature
Figure 5-18 Input Overvoltage V/I Characteristics
Figure 5-20 Input Bias Current vs Temperature
Figure 5-22 Input Offset Current vs Temperature
Figure 5-24 Positive Output Voltage Swing vs Output Current
Figure 5-26 Output Voltage Swing vs Power Supply Voltage
Figure 5-28 Maximum Output Voltage vs Frequency
Figure 5-30 Total Harmonic Distortion + Noise vs Frequency
Figure 5-32 Small-Signal Step Response
| CSO: TID | G = 100, RL = 10kΩ, CL = 100pF |
Figure 5-34 Small-Signal Step Response
Figure 5-36 Large-Signal Step Response
Figure 5-38 Large-Signal Step Response
Figure 5-40 Large-Signal Step Response