SBOS035C December   1995  – January 2026 INA2128

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
    2. 6.2 Typical Application
      1. 6.2.1 Setting The Gain
      2. 6.2.2 Dynamic Performance
      3. 6.2.3 Noise Performance
      4. 6.2.4 Offset Trimming
      5. 6.2.5 Input Bias Current Return Path
      6. 6.2.6 Input Common-Mode Range
      7. 6.2.7 Low-Voltage Operation
      8. 6.2.8 Input Protection
      9. 6.2.9 Channel Crosstalk
  8. 7Device and Documentation Support
    1. 7.1 Device Nomenclature
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

at TA = 25°C, VS = ±15 V, RL = 10 kΩ, VREF = 0 V, VCM = VS / 2, and G = 1, all chips site origins (CSO) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOS Offset voltage (RTI) INA2128U CSO: SHE ±10 ±100 / G ±50 ±500 / G µV
CSO: TID ±20 ±50 / G ±50 ±290 / G
INA2128UA CSO: SHE ±25 ±100 / G ±125 ±1000 / G
CSO: TID ±20 ±50 / G ±125 ±580 / G
Offset voltage drift (RTI) TA = –40°C to +85°C INA2128U  ±0.2 ±2 / G ±0.5 ±20 / G µV/°C
INA2128UA ±0.2 ±5 / G ±1 ±20 / G
PSRR Power-supply rejection ratio (RTI) VS = ±2.25 V to ±18 V CSO: SHE INA2128U ±0.2 ±20 / G ±1 ±100 / G µV/V
INA2128UA ±0.2 ±20 / G ±2 ±200 / G
CSO: TID INA2128U ±0.1 ±1 / G ±0.4 ±3.2 / G
INA2128UA ±0.1 ±1 / G ±0.8 ±6.4 / G
Long-term stability CSO: SHE ±0.1 ±3 / G µV/mo
CSO: TID ±0.2 ±3 / G
Input impedance Differential 10 || 2 GΩ || pF
Common-mode 100 || 9
VCM Common-mode voltage(1) VO = 0 V (V–) + 2 (V+) – 2 V
Safe input voltage  RS = 0 Ω ±40 V
CMRR Common-mode rejection ratio ΔRS = 1 kΩ, VCM = ±13 V, CSO: SHE G = 1 INA2128U 80 86 dB
INA2128UA 73 86
G = 10 INA2128U 100 106
INA2128UA 93 106
G = 100 INA2128U 120 125
INA2128UA 110 125
G = 1000 INA2128U 120 130
INA2128UA 110 130
ΔRS = 1 kΩ, VCM = ±13 V, CSO: TID G = 1 INA2128U 80 100
INA2128UA 73 100
G = 10 INA2128U 100 120
INA2128UA 93 120
G = 100 INA2128U 120 140
INA2128UA 110 140
G = 1000 INA2128U 120 145
INA2128UA 110 145
INPUT BIAS CURRENT
IB Input bias current INA2128U CSO: SHE ±2 ±5 nA
CSO: TID ±0.15 ±0.7
INA2128UA CSO: SHE ±2 ±10
CSO: TID ±0.15 ±1.4
Input bias current drift  TA = –40°C to +85°C ±30 pA/℃
IOS Input offset current INA2128U CSO: SHE ±1 ±5 nA
CSO: TID ±0.15 ±0.7
INA2128UA CSO: SHE ±1 ±10
CSO: TID ±0.15 ±1.4
Input offset current drift  TA = –40°C to +85°C ±30 pA/℃
NOISE
eN Voltage noise (RTI) G = 1000, RS = 0 Ω f = 10 Hz CSO: SHE 10 nV/√Hz
CSO: TID 7
f = 100 Hz CSO: SHE 8
CSO: TID 6.9
f = 1 kHz CSO: SHE 8
CSO: TID 6.9
fB = 0.1 Hz to 10 Hz 0.2 µVPP
Current noise f = 10 Hz 0.9 pA/√Hz
f = 1 kHz CSO: SHE 0.3
CSO: TID 0.17
fB = 0.1 Hz to 10 Hz CSO: SHE 30 pAPP
CSO: TID 4.7
GAIN
Gain equation 1 + (50 kΩ / RG) V/V
G Gain 1 10000 V/V
GE Gain error G = 1 CSO: SHE INA2128U ±0.01 ±0.024 %
INA2128UA ±0.01 ±0.1
CSO: TID INA2128U ±0.005 ±0.024
INA2128UA ±0.005 ±0.1
G = 10 CSO: SHE INA2128U ±0.02 ±0.4
INA2128UA ±0.02 ±0.5
CSO: TID INA2128U ±0.025 ±0.17
INA2128UA ±0.025 ±0.21
G = 100 CSO: SHE INA2128U ±0.05 ±0.5
INA2128UA ±0.05 ±0.7
CSO: TID INA2128U ±0.025 ±0.17
INA2128UA ±0.025 ±0.24
G = 1000 CSO: SHE INA2128U ±0.5 ±1
INA2128UA ±0.5 ±2
CSO: TID INA2128U ±0.05 ±1
INA2128UA ±0.05 ±2
Gain drift(2) TA = –40°C to +85°C CSO: SHE ±1 ±10 ppm/°C
CSO: TID ±5
50-kΩ or 49.4-kΩ resistance(3) CSO: SHE ±25 ±100
CSO: TID ±50
Gain nonlinearity G = 1, VO = ±13.6 V INA2128U ±0.0001 ±0.001 % of FSR
INA2128UA ±0.0001 ±0.002
G = 10 INA2128U ±0.0003 ±0.002
INA2128UA ±0.0003 ±0.004
G = 100 INA2128U ±0.0005 ±0.002
INA2128UA ±0.0005 ±0.004
G = 1000(4) ±0.001
OUTPUT
Positive output voltage CSO: SHE (V+) – 1.4 V
CSO: TID (V+) – 0.15
Negative output voltage CSO: SHE (V–) + 1.4 V
CSO: TID (V–) + 0.15
CL Load capacitance Stable operation 1000 pF
ISC Short-circuit current Continuous to VS / 2 CSO: SHE +6/–15 mA
CSO: TID +18/–18
FREQUENCY RESPONSE
BW Bandwidth, –3 dB G = 1 1.3 MHz
G = 10 600 kHz
G = 100 200
G = 1000 CSO: SHE 20
CSO: TID 33
SR Slew rate G = 10, VO = ±10 V CSO: SHE 4 V/µs
CSO: TID 1.2
tS Settling time To 0.01% G = 1 CSO: SHE 7 µs
CSO: TID 9 µs
G = 10 CSO: SHE 7
CSO: TID 9
G = 100 CSO: SHE 9
CSO: TID 12
G = 1000 80
Overload recovery 50% input overload 4 µs
POWER SUPPLY
IQ Total quiescent current VIN = 0 V ±1.4 ±1.5 mA
(1) Input common-mode voltage varies with output voltage; see Typical Characteristics.
(2) Specified by wafer test.
(3) Temperature coefficient of the 50-kΩ or 49.4-kΩ term in the gain equation.
(4) Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%.