SBOS051G October   1995  – January 2026 INA128 , INA129

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Noise Performance
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input Common-Mode Range
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Gain
        2. 8.2.2.2 Dynamic Performance
        3. 8.2.2.3 Offset Trimming
        4. 8.2.2.4 Input Bias Current Return Path
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Low-Voltage Operation
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
      2. 9.1.2 Development Support
        1. 9.1.2.1 PSpice® for TI
        2. 9.1.2.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

INA128 INA129 D (8-Pin SOIC) and P (8-Pin PDIP) Packages,
                    Top ViewFigure 5-1 D (8-Pin SOIC) and P (8-Pin PDIP) Packages, Top View
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
REF 5 Input Reference input. This pin must be driven by low impedance or connected to ground.
RG 1,8 Gain setting pin. For gains greater than 1, place a gain resistor between pin 1 and pin 8.
V– 4 Power Negative supply
V+ 7 Power Positive supply
VIN– 2 Input Negative input
VIN+ 3 Input Positive input
VO 6 Output Output