SBOS115A June   1999  – March 2025 INA133 , INA2133

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Gain Error and Drift
      2. 6.3.2 Input Voltage Range
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Voltage
      2. 7.1.2 Input Voltage
      3. 7.1.3 Offset Voltage Trim
    2. 7.2 Typical Application
    3. 7.3 Additional Applications
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI (Free Software Download)
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Thermal Information

THERMAL METRIC(1) INA133 INA2133 UNIT
8 PINS 14 PINS
D (SOIC) D (SOIC)
RθJA Junction-to-ambient thermal resistance 108.9 71.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 45.9 33.1 °C/W
RθJB Junction-to-board thermal resistance 56.6 31.2 °C/W
ψJT Junction-to-top characterization parameter 4.8 3.4 °C/W
ψJB Junction-to-board characterization parameter 55.7 30.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metricswww.ti.com/lit/an/spra953d/spra953d.pdf?ts=1740774276773application report.