at TA = 25°C, VS = 5V, G = +1, RF = 0Ω,
RL = 1kΩ, and connected to VS / 2, unless otherwise
noted.
Figure 6-1 Non-inverting Small- Signal Frequency Response
Figure 6-3 Non-inverting Small- Signal Step Response
Figure 6-5 0.1dB
Gain Flatness
| VO = 2VPP, f = 1MHz,
RL = 200Ω |
Figure 6-7 Harmonic Distortion vs Non-inverting Gain
| VO = 2VPP,
RL = 200Ω, VCM = 1.5V |
Figure 6-9 Harmonic Distortion vs Frequency
Figure 6-11 Input
Voltage and Current Noise Spectral Density vs Frequency
Figure 6-13 Frequency Response for Various CL Values
Figure 6-15 Frequency Response vs Capacitive Load
Figure 6-17 Open-
Loop Gain and Phase
Figure 6-19 Output Voltage Swing vs Output Current
Figure 6-21 Output Voltage Swing vs Output Current
Figure 6-23 Maximum Output Voltage vs Frequency
Figure 6-25 Open-
Loop Gain vs Temperature
Figure 6-27 Common-mode Rejection Ratio and Power-supply Rejection Ratio vs
Temperature
Figure 6-2 Inverting Small- Signal Frequency Response
Figure 6-4 Non-inverting Large- Signal Step Response
| G = –1V/V, f = 1MHz, RL =
200Ω |
Figure 6-6 Harmonic Distortion vs Output Voltage
| VO = 2VPP, f = 1MHz,
RL = 200Ω |
Figure 6-8 Harmonic Distortion vs Inverting Gain
| VO = 2VPP, f = 1MHz,
VCM = 1.5V |
Figure 6-10 Harmonic Distortion vs Load Resistance
Figure 6-12 Frequency Response vs Various RL Values
Figure 6-14 Recommended RS vs Capacitive Load
Figure 6-16 Common- Mode Rejection Ratio and Power- Supply
Rejection Ratio vs Frequency
Figure 6-18 Input
Bias Current vs Temperature
Figure 6-20 Supply Current vs Temperature
Figure 6-22 Closed- Loop Output Impedance vs Frequency
Figure 6-24 Output Settling Time to 0.1%
Figure 6-26 Offset Voltage Production Distribution
Figure 6-28 Channel-to-channel crosstalk