SBOS940B May   2019  – December 2025 OPA818

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = 6 V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 7.3.4 Low Input Capacitance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 7.4.2 Single-Supply Operation (6 V to 13 V)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Transimpedance Design Using the OPA818
    2. 8.2 Typical Applications
      1. 8.2.1 High-Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Noninverting Gain of 2 V/V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Device Comparison Table

DEVICE VS (V) BW (MHz) Input SLEW RATE (V/μs) VOLTAGE NOISE (nV/√ Hz) MINIMUM STABLE GAIN (V/V)
OPA818 ±6.5 2700 FET 1400 2.2 7
OPA657 ±5 1600 FET 700 4.8 7
OPA656 ±5 230 FET 290 7 1
OPA659 ±6 350 FET 2550 8.9 1
LMH6629(1) ±2.5 800 or 4000 BJT 530 or 1600 0.69 4 or 10
OPA858 ±2.5 5500 CMOS 2000 2.5 7
THS4631 ±15 210 FET 1000 7 1
(1) Pin selectable compensation.