SBOS940B May   2019  – December 2025 OPA818

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = 6 V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 7.3.4 Low Input Capacitance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 7.4.2 Single-Supply Operation (6 V to 13 V)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Transimpedance Design Using the OPA818
    2. 8.2 Typical Applications
      1. 8.2.1 High-Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Noninverting Gain of 2 V/V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.1.2 Wideband, Transimpedance Design Using the OPA818

With high GBWP, low input voltage and current noise, and low input capacitance, the OPA818 design is optimized for wideband, low-noise transimpedance applications. The high-voltage capability allows greater flexibility of supply voltages along with wider output voltage swings. Figure 8-2 shows an example circuit of a typical photodiode amplifier circuit. Generally the photodiode is reverse biased in a TIA application so the photodiode current in the circuit of Figure 8-2 flows into the op amp feedback loop resulting in an output voltage that reduces from VREF with increasing photodiode current. In this type of configuration and depending on the application needs, VREF can be biased closer to VS+ to achieve the desired output swing. Do not violate the input common-mode range requirements when the VREF bias is used.

The key design elements that determine the closed-loop bandwidth, f–3dB, of the circuit are:

  1. The op amp GBWP
  2. The transimpedance gain, RF
  3. The total input capacitance, CTOT, that includes photodiode capacitance, input capacitance of the amplifier (common-mode and differential capacitance), and PCB parasitic capacitance

OPA818 Wideband, Low-Noise, Transimpedance Amplifier Figure 8-2 Wideband, Low-Noise, Transimpedance Amplifier

Equation 1 shows the relationship between the previously mentioned three elements for a Butterworth response.

Equation 1. f–3dB = GBWP2πRFCTOT

The feedback resistance, RF and the total input capacitance, CTOT cause a zero in the noise gain that results in instability if left uncompensated. To counteract the effect of the zero, a pole is inserted in the noise gain by adding the feedback capacitor, CF. The Transimpedance Considerations for High-Speed Amplifiers application report discusses theories and equations that show how to compensate a transimpedance amplifier for a particular gain and input capacitance. The bandwidth and compensation equations from the application report are available in an Excel™ calculator. What You Need To Know About Transimpedance Amplifiers – Part 1 provides a link to the calculator. The details of maximizing the dynamic range of TIA front-ends (see High-Speed Optical Front-End) that uses voltages VREF1 and VREF2 are provided in the Maximizing the dynamic range of analog TIA front-end application note.