SBOSA33C September 2021 – June 2026 LMH5485-SP
PRODUCTION DATA
The LMH5485-SP provides a simple interface to a wide variety of precision SAR, ΔΣ, or higher-speed pipeline ADCs. To deliver the exceptional distortion at the output pins, considerably wider bandwidth than typically required in the signal path to the ADC inputs is provided by the LMH5485-SP. For instance, the gain-of-2, single-ended-to-differential design example provides approximately a 500MHz, small-signal bandwidth. Even if the source signal is Nyquist bandlimited, this broad bandwidth can possibly integrate enough LMH5485-SP noise to degrade the SNR through the ADC if the broadband noise is not bandlimited between the amplifier and ADC. Figure 9-1 shows an example dc-coupled, gain-of-2 interface with a controlled, interstage-bandwidth filter.
Designed for a DC-coupled 50Ω input match, this design starts with a 499Ω feedback resistor, and provides a gain of 2.35V/V to the LMH5485-SP output pins. The third-order interstage, low-pass filter provides a 20MHz Bessel response with a 0.85V/V insertion loss to the ADC, providing a net gain of 2V/V from board edge to the ADC inputs. Although the LMH5485-SP can absorb overdrives, an external protection element is added using the BAV99 low-capacitance device (see also Figure 9-1). For dc-coupled testing, pins 1 and 2 of JP1 are jumpered together. When the source is an ac-coupled, 50Ω source, pins 2 and 3 of JP1 are jumpered to maintain differential balance.