SBOSAA4B April   2025  – August 2025 INA1H94-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: INA1H94-SP
    5. 5.5 Electrical Characteristics: VS = ±9V
    6. 5.6 Electrical Characteristics: V+ = 5V and V– = 0V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Range
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 SAR ADC 12-B, 8-Channel Battery Cell Voltage Monitor
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics: VS = ±9V

at TA = 25°C, RL = 10kΩ connected to ground, and VCM = REFA = REFB = GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
GAIN
Initial VOUT = ±7.5V 1 V/V
Gain error VOUT = ±7.5V, TA = –55°C to +125°C ±0.005 ±0.047 %FSR
Gain TA = –55℃ to +125℃ ±1.5 ppm/℃
Nonlinearity ±0.0005 %FSR
OFFSET VOLTAGE
VOS Input offset TA = –55°C to +125°C 350 3500 µV
dVOS/dT Input offset drift TA = –55℃ to +125℃ 3 µV/℃
PSRR Power-supply rejection ratio VS = ±2V to ±9V, TA = –55°C to +125°C 90 120 dB
INPUT
Impedance Differential 600 800 kΩ
Common-mode 150 200 kΩ
Voltage range Differential –7.5 7.5 V
Common-mode –150 150 V
CMRR Common-mode rejection ratio f = DC, VCM = ±150V,  TA = –55℃ to +125℃ 84 100 dB
Flight model post TID exposure 
f = DC, VCM = ±150V,  TA = –55℃ to +125℃		 80
f = 500Hz, VCM = 49VPP 90
f = 1kHz, VCM = 49VPP 90
OUTPUT
VO Voltage range -7.5 7.5 V
ISC Short-circuit range ±25 mA
CL Capacitive load drive No sustained oscillations 10 nF
OUTPUT NOISE VOLTAGE
eNO Output stage voltage noise f = 0.01Hz to 10Hz 20 µVPP
f = 10kHz 550 nV/√Hz
DYNAMIC RESPONSE
Small-signal bandwidth 500 kHz
SR Slew rate VOUT = ±7.5V step 1.7 5 V/µs
BW Full-power bandwidth VOUT = 8VPP 300 kHz
tS Settling time To 0.01%, VOUT = 7.5V step 7 µs
POWER SUPPLY
VS Voltage range ±2 ±9 V
IQ Quiescent current VOUT = 0V 500 810 900 µA
VOUT = 0V, TA = –55℃ to +125℃ 1.1 mA