SBOU268 November   2021 OPA593


  1.   Trademarks
  2. 1Overview
    1. 1.1 Getting Started
      1. 1.1.1 Related Documentation From Texas Instruments
    2. 1.2 High-Voltage Warning and Safe Use
    3. 1.3 Electrostatic Discharge Caution
  3. 2Operation
    1. 2.1 Jumper Blocks, Jacks, and Test Points
    2. 2.2 Inputs
    3. 2.3 Outputs
    4. 2.4 Enable or Disable
    5. 2.5 Status Flags
      1. 2.5.1 Circuit Protection
  4. 3Application Circuits
    1. 3.1 Setting Dual-Supply or Single-Supply Operation
      1. 3.1.1 Dual-Supply Operation Configuration
      2. 3.1.2 Single-Supply Operation Configuration
    2. 3.2 Common Op-Amp Configurations
      1. 3.2.1 Inverting Gain of –10 V/V
        1. External Connections for –10 V/V Inverting Gain Configuration
        2. Inverting Gain of –10 V/V Configuration Electrical Performance
      2. 3.2.2 Noninverting Gain of +2 V/V
        1. External Connections to OPA593EVM for Noninverting Gain Configuration
        2. Noninverting Gain Configuration Electrical Performance
      3. 3.2.3 Gain of +10 V/V Difference Amplifier
        1. Jumper Shunt Locations for Difference-Amplifier Configuration
        2. Gain of 10 V/V Difference Amplifier Configuration Electrical Performance
      4. 3.2.4 Improved Howland Current Pump
        1. Jumper Shunt Locations for Improved Howland Current Pump Configuration
  5. 4Schematic, PCB Layout, and Bill of Materials
    1. 4.1 EVM Schematic
      1. 4.1.1 EVM Default Configuration
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials


The OPA593 VOUT output can be monitored at the J11 BNC jack, J12 terminal block jack, or TP14 test point. A convenient ground point, TP15, is located near TP14. The EVM includes a 1-kΩ, 2-W, surface-mount, wire-wound resistor (RL) that is connected into the circuit by JP21. PCB footprints for a load capacitor (CL) and an RC snubber network (Rz, Cz) are included, but are not populated for most uses. These unpopulated components may be populated using user-supplied components.

If the load power exceeds 2 W, make sure the load is not directly attached to the OPA593EVM PC board. Instead, connect the load to the VOUT J12 terminal block using wires.

Very-fast rectifier diodes D3 and D4 are included from the OPA593 output pin to each supply rail. The diodes protect the OPA593 output stage from potential back EMF damage sometimes created by an inductive load at VOUT.