SBVS123C December   2008  – March 2025 TPS737-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Noise
      2. 6.3.2 Internal Current Limit
      3. 6.3.3 Enable Pin and Shutdown
      4. 6.3.4 Reverse Current
      5. 6.3.5 Thermal Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Dropout Voltage
        3. 7.2.2.3 Transient Response
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Improve PSRR and Noise Performance
        2. 7.4.1.2 Power Dissipation
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Typical Characteristics

TJ = 25°C, VIN = (VOUT(nom) + 1V), IOUT = 10mA, VEN = 2.2V, COUT = 2.2µF (unless otherwise noted)

TPS737-Q1 Load
                        Regulation
Legacy silicon
Figure 5-1 Load Regulation
TPS737-Q1 Line
                        Regulation
Legacy silicon
Figure 5-3 Line Regulation
TPS737-Q1 Dropout Voltage vs Output Current
Legacy silicon
Figure 5-5 Dropout Voltage vs Output Current
TPS737-Q1 Dropout Voltage vs Temperature
Legacy silicon
Figure 5-7 Dropout Voltage vs Temperature
TPS737-Q1 Output Voltage Histogram
Legacy silicon
Figure 5-9 Output Voltage Histogram
TPS737-Q1 Ground Pin Current vs Output Current
Legacy silicon
Figure 5-11 Ground Pin Current vs Output Current
TPS737-Q1 Ground Pin Current vs Temperature
Legacy silicon
Figure 5-13 Ground Pin Current vs Temperature
TPS737-Q1 Ground Pin Current In Shutdown vs Temperature
Legacy silicon
Figure 5-15 Ground Pin Current In Shutdown vs Temperature
TPS737-Q1 Current Limit vs VOUT (Foldback)
Legacy silicon
Figure 5-17 Current Limit vs VOUT (Foldback)
TPS737-Q1 Current Limit vs VIN
Legacy silicon
Figure 5-19 Current Limit vs VIN
TPS737-Q1 Current Limit vs Temperature
Legacy silicon
Figure 5-21 Current Limit vs Temperature
TPS737-Q1 PSRR
                        (Ripple Rejection) vs Frequency
Legacy silicon
Figure 5-23 PSRR (Ripple Rejection) vs Frequency
TPS737-Q1 PSRR
                        (Ripple Rejection) vs VIN – VOUT
Legacy silicon
Figure 5-25 PSRR (Ripple Rejection) vs VIN – VOUT
TPS737-Q1 Noise
                        Spectral Density
Legacy silicon
Figure 5-27 Noise Spectral Density
TPS737-Q1 TPS73701-Q1 RMS Noise Voltage vs CFB
Legacy silicon
Figure 5-29 TPS73701-Q1 RMS Noise Voltage vs CFB
TPS737-Q1 RMS
                        Noise Voltage vs COUT
Legacy silicon
Figure 5-31 RMS Noise Voltage vs COUT
TPS737-Q1 RMS
                        Noise Voltage vs CNR
Legacy silicon
Figure 5-33 RMS Noise Voltage vs CNR
TPS737-Q1 TPS73733-Q1 Load Transient Response
Legacy silicon
Figure 5-35 TPS73733-Q1 Load Transient Response
TPS737-Q1 TPS73733-Q1 Line Transient Response
Legacy silicon
Figure 5-37 TPS73733-Q1 Line Transient Response
TPS737-Q1 TPS73701-Q1 Turn-On Response
Legacy silicon
Figure 5-39 TPS73701-Q1 Turn-On Response
TPS737-Q1 TPS73701-Q1 Turn-Off Response
Legacy silicon
Figure 5-41 TPS73701-Q1 Turn-Off Response
TPS737-Q1 TPS73701-Q1, VOUT = 3.3V Power-Up And Power-Down
Legacy silicon
Figure 5-43 TPS73701-Q1, VOUT = 3.3V Power-Up And Power-Down
TPS737-Q1 IENABLE vs Temperature
Legacy silicon
Figure 5-45 IENABLE vs Temperature
TPS737-Q1 TPS73701-Q1 IFB vs Temperature
Legacy silicon
Figure 5-47 TPS73701-Q1 IFB vs Temperature
TPS737-Q1 TPS73701-Q1 Load Transient, Adjustable Version
Legacy silicon
Figure 5-49 TPS73701-Q1 Load Transient, Adjustable Version
TPS737-Q1 TPS73701-Q1 Line Transient, Adjustable Version
Legacy silicon
Figure 5-51 TPS73701-Q1 Line Transient, Adjustable Version
TPS737-Q1 Load Regulation
New silicon
Figure 5-2 Load Regulation
TPS737-Q1 Line Regulation
New silicon
Figure 5-4 Line Regulation
TPS737-Q1 Dropout Voltage vs Output
                        Current
New silicon
Figure 5-6 Dropout Voltage vs Output Current
TPS737-Q1 Dropout Voltage vs
                        Temperature
New silicon
Figure 5-8 Dropout Voltage vs Temperature
TPS737-Q1 Dropout Voltage Drift Histogram
Legacy silicon
Figure 5-10 Dropout Voltage Drift Histogram
TPS737-Q1 Ground Pin Current vs
                        Output Current
New silicon
Figure 5-12 Ground Pin Current vs Output Current
TPS737-Q1 Ground Pin Current vs
                        Temperature
New silicon
Figure 5-14 Ground Pin Current vs Temperature
TPS737-Q1 Ground Pin Current in
                        Shutdown vs Temperature
New silicon
Figure 5-16 Ground Pin Current in Shutdown vs Temperature
TPS737-Q1 Current Limit vs VOUT (Foldback)
New silicon
Figure 5-18 Current Limit vs VOUT (Foldback)
TPS737-Q1 Current Limit vs
                            VIN
New silicon
Figure 5-20 Current Limit vs VIN
TPS737-Q1 Current Limit vs
                        Temperature
New silicon
Figure 5-22 Current Limit vs Temperature
TPS737-Q1 PSRR (Ripple Rejection) vs
                        Frequency
New silicon
Figure 5-24 PSRR (Ripple Rejection) vs Frequency
TPS737-Q1 PSRR
                        (Ripple Rejection) vs (VIN – VOUT)
New silicon
Figure 5-26 PSRR (Ripple Rejection) vs (VIN – VOUT)
TPS737-Q1 Noise
                        Spectral Density
New silicon
Figure 5-28 Noise Spectral Density
TPS737-Q1 TPS73701-Q1 RMS Noise
                        Voltage vs CFB
New silicon
Figure 5-30 TPS73701-Q1 RMS Noise Voltage vs CFB
TPS737-Q1 RMS
                        Noise Voltage vs COUT
New silicon
Figure 5-32 RMS Noise Voltage vs COUT
TPS737-Q1 RMS
                        Noise Voltage vs CNR
New silicon
Figure 5-34 RMS Noise Voltage vs CNR
TPS737-Q1 TPS73733-Q1 Load Transient Response
New silicon
Figure 5-36 TPS73733-Q1 Load Transient Response
TPS737-Q1 TPS73733-Q1 Line Transient Response
New silicon
Figure 5-38 TPS73733-Q1 Line Transient Response
TPS737-Q1 TPS73701-Q1 Turn-On
                        Response
New silicon
Figure 5-40 TPS73701-Q1 Turn-On Response
TPS737-Q1 TPS73701-Q1 Turn-Off
                        Response
New silicon
Figure 5-42 TPS73701-Q1 Turn-Off Response
TPS737-Q1 TPS73701-Q1,
                            VOUT = 3.3V Power-Up and Power-Down
New silicon
Figure 5-44 TPS73701-Q1, VOUT = 3.3V Power-Up and Power-Down
TPS737-Q1 IEN vs Temperature
New silicon
Figure 5-46 IEN vs Temperature
TPS737-Q1 TPS73701-Q1 IFB vs Temperature
New silicon
Figure 5-48 TPS73701-Q1 IFB vs Temperature
TPS737-Q1 TPS73701-Q1 Load Transient, Adjustable Version
New silicon, COUT = 10μF tantalum
Figure 5-50 TPS73701-Q1 Load Transient, Adjustable Version
TPS737-Q1 TPS73701-Q1 Line
                        Transient, Adjustable Version
New silicon, COUT = 10μF tantalum
Figure 5-52 TPS73701-Q1 Line Transient, Adjustable Version