SCAS529F August   1995  – June 2025 SN54AC10 , SN74AC10

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    6. 5.6 Switching Characteristics, VCC = 5 V ± 0.5 V
    7. 5.7 Operating Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diode Structure
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 Power Supply Recommendations
      5. 8.2.5 Layout
        1. 8.2.5.1 Layout Guidelines
        2. 8.2.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Description

The SNx4AC10 contains three independent 3-input NAND gates. The devices perform the Boolean function Y = A • B • C in positive logic.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SNx4AC10 DB (SSOP, 14) 6.2mm × 7.8mm 6.2mm × 5.3mm
D (SOIC, 14) 8.65mm × 6mm 8.65mm × 3.9mm
N (PDIP, 14) 19.3mm × 9.4mm 19.3mm × 6.35mm
NS (SO, 14) 10.2mm × 7.8mm 10.3mm × 5.3mm
PW (TSSOP, 14) 5mm × 6.4mm 5mm × 4.4mm
BQA (WQFN, 14) 3mm × 2.5mm 3mm × 2.5mm
The package size (length × width) is a nominal value and includes pins, where applicable.
The body size (length × width) is a nominal value and does not include pins.
SN54AC10 SN74AC10 Logic Diagram, Each Gate
                        (Positive Logic) Logic Diagram, Each Gate (Positive Logic)