SCASE80 September   2025 TPUL2T323-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7.     13
    8. 5.7 Switching Characteristics
    9. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Naming Convention
      2. 7.3.2 Retriggerable One-Shot
      3. 7.3.3 Extended RC Timed One-Shot
      4. 7.3.4 Balanced CMOS Push-Pull Outputs
      5. 7.3.5 CMOS Schmitt-Trigger Inputs
      6. 7.3.6 Latching Logic with Known Power-Up State
      7. 7.3.7 Partial Power Down (Ioff)
      8. 7.3.8 Reduced Input Threshold Voltages
      9. 7.3.9 Clamp Diode Structure
    4. 7.4 Device Functional Modes
      1. 7.4.1 Off-State Operation
      2. 7.4.2 Startup Operation
      3. 7.4.3 On-State Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application - Edge Detector
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Timing Components
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
        4. 8.2.1.4 Power Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application - Delayed Pulse Generator
      1. 8.3.1 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

TPUL2T323-Q1 PW Package16-Pin TSSOPTop View
See mechanical drawings for dimensions.
Figure 4-1 PW Package16-Pin TSSOPTop View
Table 4-1 Pin Functions
PINI/O(1)DESCRIPTION
NAMENO.
1T1IChannel 1 falling edge trigger input; requires 1T and 1CLR to be held high
1T2IChannel 1 rising edge trigger input; requires 1T to be held low and 1CLR to be held high
1CLR3IChannel 1 asynchronous clear input, active low; also can operate as rising edge trigger input if 1T is held low and 1T is held high
1Q4OChannel 1 inverted output
2Q5OChannel 2 output
2C6GChannel 2 external timing capacitor negative connection; provides a return path for discharge current of the external timing capacitor; internally connected to ground
2RC7I/OChannel 2 external timing node connection; see Application Information section for detailed operation instructions
GND8GGround
2T9IChannel 2 falling edge trigger input; requires 2T and 2CLR to be held high
2T10IChannel 2 rising edge trigger input; requires 2T to be held low and 2CLR to be held high
2CLR11IChannel 2 asynchronous clear input, active low; also can operate as rising edge trigger input if 2T is held low and 2T is held high
2Q12OChannel 2 inverted output
1Q13OChannel 1 output
1C14GChannel 1 external timing capacitor negative connection; provides a return path for discharge current of the external timing capacitor; internally connected to ground
1RC15I/OChannel 1 external timing node connection; see Application Information section for detailed operation instructions
VCC16PPostive voltage supply
(1) I = Input, O = Output, I/O = Input and output, G = Ground, P = Power