SCDS148A
October 2003 – May 2025
SN74CB3T3253
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics 85C
5.7
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
1
Features
Output voltage translation tracks V
CC
Supports mixed-mode signal operation on all data I/O ports
5V input down to 3.3V output level shift with 3.3V V
CC
5V/3.3V input down to 2.5V output level shift with 2.5V V
CC
5V tolerant I/Os with device powered up or powered down
Bidirectional data flow with near-zero propagation delay
Low ON-state resistance (r
on
) characteristics (r
on
= 5Ω typ)
Low input/output capacitance minimizes loading (C
io(OFF)
= 5pF typ)
Data and control inputs provide undershoot clamp diodes
Low power consumption (I
CC
= 20μA max)
V
CC
operating range from 2.3V to 3.6V
Data I/Os support 0V to 5V signaling levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
Control inputs can be driven by TTL or 5V/3.3V CMOS outputs
I
off
supports partial-power-down mode operation
Latch-up performance exceeds 250mA per JESD 17
ESD performance tested per JESD 22
2000V human-body model (A114-B, Class II)
1000V charged-device model (C101)