SCDS383F August 2018 – July 2025 TMUX6111 , TMUX6112 , TMUX6113
PRODUCTION DATA
The TMUX6111, TMUX6112, and TMUX6113 are implemented with simple transmission gate topology, as shown in Figure 8-12. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed. The devices utilize special charge-injection cancellation circuitry that reduces the source (Sx)-to-drain (Dx) charge injection to as low as 0.6pC at VS = 0V, as shown in Figure 8-13.
Figure 8-12 Transmission Gate Topology
Figure 8-13 Source-to-Drain Charge Injection vs Source or Drain Voltage