SCES481 Data sheet | TI.com

SCES481E August 2003 – August 2024 SN74LVC74A-Q1

PRODUCTION DATA

4.6 Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see Load Circuit and Voltage Waveforms)

			V_CC = 2.7 V		V_CC = 3.3 V ± 0.3 V		UNIT
			MIN	MAX	MIN	MAX	UNIT
f_clock	Clock frequency			83		100	MHz
t_w	Pulse duration	PRE or CLR low	3.3		3.3		ns
t_w	Pulse duration	CLK high or low	3.3		3.3		ns
t_su	Setup time before CLK↑	Data	3.4		3		ns
t_su	Setup time before CLK↑	PRE or CLR inactive	2.2		2		ns
t_h	Hold time, data after CLK↑		1		1		ns