SCES902A September   2019  – October 2025 SN74LVC2GU04-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics – -40°C to 85°C
    7. 5.7 Switching Characteristics – -40°C to 125°C
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristic
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Negative Clamping Diodes
      4. 7.3.4 Over-voltage Tolerant Inputs
      5. 7.3.5 Unbuffered Logic
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

3 Description

This dual inverter is designed for 1.65V to 5.5V VCC operation.

The SN74LVC2GU04-Q1 device contains two inverters with unbuffered outputs and performs the Boolean function Y = A.

Device Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE (NOM)(3)
SN74LVC2GU04-Q1 DRY (SON, 6) 1.45mm × 1.00mm 1.45mm × 1.00mm
DCK (SC-70, 6) 2.00mm × 2.10mm 2.00mm × 1.25mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.

 

SN74LVC2GU04-Q1 Logic Diagram (Positive Logic) Logic Diagram (Positive Logic)