SCES902A September   2019  – October 2025 SN74LVC2GU04-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics – -40°C to 85°C
    7. 5.7 Switching Characteristics – -40°C to 125°C
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristic
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Negative Clamping Diodes
      4. 7.3.4 Over-voltage Tolerant Inputs
      5. 7.3.5 Unbuffered Logic
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

5.4 Thermal Information

THERMAL METRIC(1) DCK DRY UNIT
(6 PINS) (6 PINS)
RθJA Junction-to-ambient thermal resistance 187.7 233.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 115.2 144.6 °C/W
RθJB Junction-to-board thermal resistance 48.4 119.9 °C/W
ψJT Junction-to-top characterization parameter 30.9 15.8 °C/W
ψJB Junction-to-board characterization parameter 48.2 119.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application note.