SCLA017A July   2019  – April 2021 SN74HC595

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Optimizing System Controller I/O Usage
  4. 3Logic and Translation Use Cases
    1. 3.1 Logic Use Cases
      1. 3.1.1 Combine Power Good Signals
      2. 3.1.2 Debounce Switches and Buttons
      3. 3.1.3 Increase Number of Controller Inputs
      4. 3.1.4 Increase Number of Controller Outputs
    2. 3.2 Voltage Translation Use Cases
      1. 3.2.1 SPI Communication
      2. 3.2.2 RMII Communication
  5. 4Recommended Logic and Translation Families for Network Switches
    1. 4.1 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    2. 4.2 LVC: Low-Voltage CMOS Logic and Translation
    3. 4.3 HC: High-speed CMOS Logic
  6. 5Revision History

3.1.3 Increase Number of Controller Inputs

GUID-089963EF-E977-448A-A66B-D830351DEE1E-low.gif Figure 3-3 Using Shift-register to Serialize Parallel Data and Conserve Controller I/O's
  • Input 8 bits of parallel data to the System Controller with as few as two I/Os
  • Daisy chain shift registers to produce large numbers of inputs
  • Input up to 180 Mbps of serial data with a parallel-in serial-out shift register
  • See online parametric search tool to find the right Shift Register