SCLA021A September   2019  – April 2021 SN74HC00 , SN74HCS08-Q1

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Optimizing Communication with Wireless Interfaces
    1. 2.1 SDIO Voltage Translation
    2. 2.2 SPI Voltage Translation
  4. 3Logic and Translation Use Cases
    1. 3.1 Logic Use Cases
      1. 3.1.1 Drive Indicator LEDs
      2. 3.1.2 Power Sequencing: Combine Power-Good Signals
      3. 3.1.3 Debounce Switches and Buttons
      4. 3.1.4 Latching Alarm Circuit with Reset
      5. 3.1.5 Buffer and Driver: Condition Digital Signals
    2. 3.2 Voltage Translation Use Cases
      1. 3.2.1 SPI Communication
      2. 3.2.2 GPIO Communication
      3. 3.2.3 I2C Communication
      4. 3.2.4 I2S Communication
  5. 4Recommended Logic and Translation Families for Smart Thermostats
    1. 4.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 4.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    3. 4.3 LVC: Low-Voltage CMOS Logic and Translation
  6. 5Revision History

3.1.3 Debounce Switches and Buttons

GUID-D22D0495-3892-4401-908A-5C89503658D6-low.gif Figure 3-3 Using Logic to Prevent Multiple Triggers of a CMOS Input Due to Switch Bounce
  • Prevents multiple triggers of CMOS inputs due to switch bounce.
  • Works when the system controller is asleep.
  • Works without a system controller.
  • Reduces controller code complexity; no software debounce is required.
  • See Debounce a Switch Logic Minute video for more information about this use case.
  • See online parametric search tool to find the right Schmitt-trigger buffer.