SCLS429O May   1999  – July 2025 SN74LV4052A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information: SN74LV4052A
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Characteristics VCC = 2.5V ± 0.2V
    7. 5.7  Timing Characteristics VCC = 3.3V ± 0.3V
    8. 5.8  Timing Characteristics VCC = 5V ± 0.5V
    9. 5.9  AC Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

3 Description

The SNx4LV4052A device is a dual, 4-channel CMOS analog multiplexer and demultiplexer that is designed for 1.65V to 5.5V VCC operation.

The SNx4LV4052A device handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE (2)
SNx4LV4052AD (SOIC, 16)9.9mm × 6mm
PW (TSSOP, 16)5mm × 6.4mm
RGY (VQFN, 16)4mm × 3.5mm
DYY (SOT-23-THIN, 16) 4.2mm x 3.26mm
(1) For more information, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
SN74LV4052A Logic Diagram (Positive Logic) Logic Diagram (Positive Logic)