SCPS311 March   2026 TXE8124

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 SPI Bus Timing Requirements
    8. 5.8 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 I/O Port
      2. 7.3.2 Interrupt Output (INT)
      3. 7.3.3 Reset Input (RESET)
      4. 7.3.4 Bus Hold
      5. 7.3.5 Fail-safe Mode
      6. 7.3.6 Software Reset Call
      7. 7.3.7 Daisy Chain
      8. 7.3.8 Multi Port
      9. 7.3.9 Feature Register Mapping
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 SPI Interface
      2. 7.5.2 SPI Data Format
      3. 7.5.3 Burst Mode
      4. 7.5.4 SPI Write
      5. 7.5.5 SPI Read
      6. 7.5.6 SPI Daisy Chain
    6. 7.6 TXE8124 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.5.6 SPI Daisy Chain

In daisy chain mode of operation, the SPI transaction from the controller consists of 3 types of segments: Header (16-bit), Address (Nx16-bit) and Data (Nx8-bit). As the TXE8124 receives the same and transmits it to the next device in the chain, it appends a Status (16-bit) to the transaction, while removing the Address segment and replacing the Data segement that corresponds to its position in the chain.

Figure 7-11 shows an example of a daisy chain write for 2 devices in daisy chain. The header byte is transmitted with the chain length (CL) value of 2, followed by the address for DUT2, DUT1 and then the 8-bit data-in for DUT2, DUT1. As the first device shifts the data out, it transmits its status segement, followed by the original header, address for DUT2, data-out from DUT1 and data-in for DUT2. The final device in the chain sends its status, followed by status for DUT1 and finally data-out for DUT2, DUT1.


TXE8124 SPI Daisy Chain Write
Figure 7-11 SPI Daisy Chain Write

Figure 7-12 shows an example of a daisy chain read for 2 devices in daisy chain. The header byte is transmitted with the chain length (CL) value of 2, followed by the address for DUT2, DUT1 and then the 8-bit dummy data-in for DUT2, DUT1. As the first device shifts the data out, it transmits its status segement, followed by the original header, address for DUT2, data-out from DUT1 and dummy data-in for DUT2. The final device in the chain sends its status, followed by status for DUT1 and finally data-out for DUT2, DUT1.


TXE8124 SPI Daisy Chain Read
Figure 7-12 SPI Daisy Chain Read