SDAA150 December   2025 ADS124S06 , ADS124S08

 

  1.   1
  2.   Abstract
  3. 1Circuit Design and Test System
    1. 1.1 Design Overview
    2. 1.2 Overview of EMC Test Board for RTD Measurements
      1. 1.2.1 Input Configurations and ADC Settings
        1. 1.2.1.1 Configuration and settings for a 3-wire RTD measurement with a low-side reference
        2. 1.2.1.2 Configuration and settings for a 3-wire RTD measurement with a high-side reference
      2. 1.2.2 Temperature Error - RTD Measurement
        1. 1.2.2.1 Calculating RTD temperature from RTD resistance
        2. 1.2.2.2 Calculating the temperature error from RTD measurements
        3. 1.2.2.3 Experimental setup and results
    3. 1.3 Overview of EMC Test Board for TC Measurements
      1. 1.3.1 Input Configurations and ADC Settings
        1. 1.3.1.1 Input Configurations
        2. 1.3.1.2 Thermocouple Characteristics and ADC Settings
      2. 1.3.2 Temperature Error - TC Measurement
        1. 1.3.2.1 Calculating temperature from TC thermoelectric voltage
        2. 1.3.2.2 Calculating the temperature error from TC measurements
        3. 1.3.2.3 Experimental setup and results
    4. 1.4 Circuit Design Considerations for EMC compliance
      1. 1.4.1 Analog Input Protection
      2. 1.4.2 Anti-aliasing Filter
      3. 1.4.3 High-voltage Capacitors on Every Input Connector Pin
      4. 1.4.4 High-voltage Capacitors and Resistors for Discharging Path
      5. 1.4.5 Series Resistors on Digital Signals
      6. 1.4.6 Digital Isolation
      7. 1.4.7 Power Supply and Protection
    5. 1.5 PCB Layout Consideration for EMC compliance
      1. 1.5.1 PCB Layer Stack-up and Ground Plane
      2. 1.5.2 Avoiding a Long Return Path
      3. 1.5.3 Avoiding 90-degree Bends in PCB Traces
      4. 1.5.4 Using Guard Ring to Isolate Interference Signals
      5. 1.5.5 Decoupling Capacitors
      6. 1.5.6 Differential Signal Routing
      7. 1.5.7 Stitching Vias
      8. 1.5.8 Layout for Isolation Barrier
      9. 1.5.9 Component Placement
    6. 1.6 Test System
  4. 2Test Details and Results
    1. 2.1 Standards and Test Criteria
    2. 2.2 Electrostatic Discharge (ESD)
    3. 2.3 Radiated Immunity (RI)
    4. 2.4 Electrical Fast Transients (EFT)
    5. 2.5 Surge Immunity (SI)
    6. 2.6 Conducted Immunity (CI)
  5. 3Schematic, PCB Layout and Bill of Materials
    1. 3.1 Schematic - RTD EMC Test Board
    2. 3.2 Schematic - TC EMC Test Board
    3. 3.3 PCB Layout - RTD EMC Test Board (4-Layer)
    4. 3.4 PCB Layout - RTD EMC Test Board (2-Layer)
    5. 3.5 PCB Layout - TC EMC Test Board (4-Layer)
    6. 3.6 PCB Layout - TC EMC Test Board (2-Layer)
    7. 3.7 Bill of Materials - RTD EMC Test Board
    8. 3.8 Bill of Materials - TC EMC Test Board
  6. 4Summary
  7. 5References

1.2.1.2 Configuration and settings for a 3-wire RTD measurement with a high-side reference

Figure 1-4 shows the 3-wire RTD measurement system with a high-side reference configuration used by the EMC test board. Two matched IDAC current sources are used for lead wire resistance cancellation. The ADS124S08 measures the RTD voltage using the AIN4 and AIN3 analog input channels on the EMC test board.
3-Wire RTD, High-side Reference Measurement CircuitFigure 1-4 3-Wire RTD, High-side Reference Measurement Circuit.
The ADS124S08 was programmed with the following settings to measure the circuit shown in Figure 1-4:
  • 4−kSPS data rate
  • Sinc3 digital filter
  • AIN4/AIN3 analog input
  • IDAC1=IDAC2=250uA

  • IDAC1 on AIN5, IDAC2 on AIN2

  • External voltage reference on REFP1/REFN1
  • Both positive and negative reference buffers are enabled

Equation 11 to Equation 17 calculate that a gain of 4 is required to maximize the ADS124S08 dynamic range for RTD measurements using a high-side reference:

Equation 11. R1=0Ω, R18=400Ω (bias resistor)
Equation 12. RRTDmin≈18.5Ω at -200°C (PT100)
Equation 13. VRTD_min=IIDAC×RRTD_min=250µA×18.5Ω=0.004625V
Equation 14. VADC_min=Gain×VRTD_min=4×0.004625V=0.00185V
Equation 15. RRTDmax≈390Ω at +850°C (PT100)
Equation 16. VRTD_max=IIDAC×RRTD_max=250µA×390Ω=0.0975V
Equation 17. VADC_max=Gain×VRTD_max=4×0.0975V=0.39V

Equation 18 calculates the ADS124S08 reference voltage due to the specified IDAC current flowing through the precision 2.2kΩ reference resistor (R2) :

Equation 18. VREF=IIDAC×RREF=250µA×2.2kΩ=0.55V

Equation 19 and Equation 20 show how to compute the RTD resistance (RRTD) from the conversion code (CODE):

Equation 19. CODE=VRTD×Gain×2N-1VREF=IIDAC×RRTDΩ×Gain×2N-1IIDAC×RREF=RRTDΩ×Gain×2N-1RREF
Equation 20. RRTD=CODE×RREFGain×2N-1

Where:

  • CODE is the conversion code obtained from the ADS124S08.

  • RREF is the external reference resistor.

  • N is the resolution of the ADC, where N = 24 for the ADS124S08.

  • Gain is the value of the ADS124S08 PGA gain.

Additionally, the resistor values, IDAC current and gain setting are selected to meet the ADS124S08 IDAC compliance voltage in both designs.