SDAA334 October 2026 TPS61170
Figure 3-1 shows the simulation results during initial startup based on the schematic as shown in Figure 2-1 using D1 only. When the input voltage is 7V and the CTRL pin of the TPS61170 transitions from Low to High, the results demonstrate that both VOUT_P and VOU_N outputs are properly regulated and stabilized normally.
Figure 3-1 Initial Startup for the Both VOUT_P and VOU_N Figure 3-2 shows the principle current and voltage waveforms in steady-state operation. The VOUT_P and VOUT_N outputs are properly regulated, and the voltage waveforms of VSW and VA are also operating normally at a switching frequency of 1.2MHz. In addition, the inductor current of L1 is observed to operate in CCM.
Figure 3-2 Principal Waveforms Under Steady-State Operation Figure 3-3 shows the simulation results during initial startup based on the schematic as shown in Figure 2-3 using D1 and D4 together. When the input voltage is 7V and the CTRL pin of the TPS61170 transitions from Low to High in the same way, the results demonstrate that both VOUT_P and VOU_N outputs are properly regulated and stabilize with more accurate VOUT_N output as it is shown in the simulation results below.
Figure 3-3 Initial Startup for the Both VOUT_P and VOU_N Using D1 and D4Figure 3-4 shows the principle current and voltage waveforms in steady-state operation using D1 and D4. The VOUT_P and VOUT_N outputs are properly regulated, and this allows a more accurate VOUT_N output to be obtained as shown in Figure 3-4.
Figure 3-4 Principal Waveforms Under Steady-State
Operation Using D1 and D4