SDAA415 September   2026 MSPM0L1126 , MSPM0L1127 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L2116 , MSPM0L2117 , MSPM0L2227 , MSPM0L2227-Q1 , MSPM0L2228 , MSPM0L2228-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Key Features
    1. 2.1 Scope
  6. 3 Detailed Description
    1. 3.1 MSPM0L211x LCD Controller Overview
    2. 3.2 Primary and Secondary Topology
    3. 3.3 Primary MCU
      1. 3.3.1 Secondary MCU
    4. 3.4 Why Synchronization is Critical
  7. 4 System Architecture
    1. 4.1 Block Diagram
    2. 4.2 Signal Flow Diagram
  8. 5 Hardware Implementation
    1. 5.1 Signal Interconnections
  9. 6 Theory of Operation
    1. 6.1 Clock Synchronization
    2. 6.2 Frame Synchronization
    3. 6.3 Enable Synchronization
    4. 6.4 COM and SEG Waveform Phase Relationship
  10. 7 Software Configuration
    1. 7.1 Recommended Start-Up Sequence
    2. 7.2 Secondary Initialization Code
    3. 7.3 Primary Initialization Code
    4. 7.4 Updating the Display at Run Time
    5. 7.5 Configuration Parameters Must Match
  11. 8 Launchpad Connections
  12. 9 Timing of Synchronization Signals
  13. 10Cost Analysis
  14. 11Summary
  15. 12References

3.1 MSPM0L211x LCD Controller Overview

The MSPM0L222x integrates a full-featured LCD controller with the following characteristics:

  • Supports static, 2-mux, 3-mux, 4-mux, 5-mux, 6-mux, 7-mux and 8-mux drive modes
  • Internal charge pump for contrast control independent of VDD
  • Low-power waveform mode practical for always-on display applications
  • Internal low-frequency clock (LFCLK) sourced from the 32kHz oscillator or LFOSC
  • Hardware-generated COM and SEG drive waveforms with no CPU intervention

In a standalone design the LCD controller generates LCD_LFCLK, LCDSON (frame start), and LCD_EN internally. In the primary and secondary configuration described here, those same signals are routed externally from the primary MCU to the secondary MCU, replacing the internal timing source of the secondary with that of the primary, thereby verifying synchronization.