SDAA436 September 2026 DRV8000-Q1
Within the AM62L processor is a Power Sleep Controller (PSC) architecture which is responsible for managing the power and clocking for each peripheral, controller and core. There are multiple PSCs for AM62L, each with its own power domains. To provide more granularity on the control of the components within a PSC, there are child nodes of the power domain called local power sleep controllers (LPSCs) which allows for software control of individual modules.
LPSCs are software controllable except for the 'ALWAYS-ON' domain which cannot be turned off. The Linux device tree will initialize the required clocks for each peripheral. Since the clock will be active, the LPSC will be on, hence the peripheral will be on and consuming power. This also works in reverse where if a device tree node is disabled, then the clock will not be initialized so the LPSC will remain off.
In cases where an LPSC is not described in the device tree, the LPSC state can be changed so that the LPSC is clock gated and the local reset is de-asserted.