SDAA436 September   2026 DRV8000-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction to Human Machine Interface
  5. 2 Introduction to AM62L
  6. 3 Demo Overview
    1. 3.1 Background
  7. 4 Methods to Reduce Active Power
    1. 4.1 Light Weight Graphics Application
    2. 4.2 Minimal Linux Device Tree
    3. 4.3 Local Power Sleep Controller (LPSC)
    4. 4.4 Reducing Clock Frequencies
    5. 4.5 Auto Clock Gating
    6. 4.6 DDR in Auto Self-Refresh
    7. 4.7 Performance
  8. 5 Demo Specific Optimizations
    1. 5.1 LVGL Application
    2. 5.2 Minimal Device Tree
    3. 5.3 Slow Clock Speed
    4. 5.4 Slow A53 Core Clock Frequency
    5. 5.5 Turn Off One A53 Core
    6. 5.6 Slow DDR Transfer Speed
    7. 5.7 DDR Auto Self-Refresh
    8. 5.8 Auto Clock Gating
    9. 5.9 Slow Panel FPS
  9. 6 Power Data
  10. 7 Implementing Low Powers Modes within an HMI Use Case
  11. 8 Demo Steps
    1. 8.1 System Requirements
    2. 8.2 Prepare the SD Card
      1. 8.2.1 Build the Required Files
        1. 8.2.1.1 Boot Images
        2. 8.2.1.2 U-Boot Commands
        3. 8.2.1.3 GUI Files
        4. 8.2.1.4 Kernel Image, Modules, and Device Tree
        5. 8.2.1.5 Scripts
    3. 8.3 Run the Demo
  12. 9 Summary
  13. 10References
  14. 11Appendix
    1. 11.1  Display Image
    2. 11.2  Minimal Device Tree Patch
    3. 11.3  Slow Clock Frequencies
    4. 11.4  Slow DDR Speed to 800 MT/s Patch
    5. 11.5  Enable Auto Self Refresh for DDR
    6. 11.6  Enable Auto Clock Gating
    7. 11.7  Slow Panel Pixel Clock by Half Patch
    8. 11.8  U-Boot Commands
    9. 11.9  Enable All Power Optimizations and Run lvglsim Binary
    10. 11.10 RPI Touch Display Troubleshooting

5.8 Auto Clock Gating

AM62L offers several auto clock gating for several controllers. To enable auto clock gating for all controllers, write 0 to the WKUP_CTRL_MMR_CFG5_CLKGATE_CTRL0 register. Refer to Appendix 11.6 on how to enable auto clock gating in Arm Trusted Firmware.