SDAA490A September   2026  – October 2026 UCC25661

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Full-Bridge LLC Operating Principle
  6. 3Implementation With UCC25661x
    1. 3.1 Gate Drive Architecture
    2. 3.2 ISNS Circuit Modification
    3. 3.3 Auxiliary Logic Implementation
    4. 3.4 Logic Level Signal Translation
  7. 4Hardware Results
  8. 5Summary
  9. 6References
  10. 7Revision History

Gate Drive Architecture

The UCC25661x generates the HO and LO signals required for half-bridge LLC operation. In a full-bridge LLC converter, the high-side switches of each leg are referenced to different floating switch nodes rather than to ground (PGND). Therefore, the controller outputs cannot be directly applied to the follower leg. Isolated gate drivers are employed to verify that each gate signal is properly referenced to its corresponding source terminal, enabling correct gate-drive voltage. Similar gate drivers can be used on the controller leg as well to verify delay matching across both the legs. Here, HO1 and LO1 denote the controller leg gate drive signals, and HO2 and LO2 denote the follower leg gate drive signals. HS and HS1 denote the switching node voltage of the controller and follower leg respectively.

 UCC25661x Implementation in
                    Half-Bridge LLC Figure 3-1 UCC25661x Implementation in Half-Bridge LLC
 Full-Bridge LLC Isolated Gate
                    Driver Implementation Figure 3-2 Full-Bridge LLC Isolated Gate Driver Implementation

The controller outputs HO and LO are routed through four isolated gate drivers to generate the gate-drive signals HO1, LO1, HO2, and LO2 required for the full-bridge LLC converter. The high-side gate drivers employ bootstrap circuits to provide the floating gate-drive supply referenced to the respective switching nodes (HS and HS1).