SFFS006B November   2020  – March 2024 LMR33610 , LMR33620 , LMR33630 , LMR33640

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 LMR33610, LMR33620 Functional Safety Failure in Time (FIT) Rates
    2. 2.2 LMR33630 Functional Safety Failure In Time (FIT) Rates
    3. 2.3 LMR33640 Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 VQFN Package
    2. 4.2 HSOIC Package
  7. 5Revision History

VQFN Package

Figure 4-2 shows the LMR336x0 pin diagram for the VQFN package (RNX designator). For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the appropriate device data sheet.

GUID-9604561E-3AF4-4F98-A661-0687949FBA59-low.gif Figure 4-1 Pin Diagram
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
PGND 1,11 No effect D
VIN 2,10 Device will not operate. No output voltage will be generated. Output capacitors will discharge through input short. Large reverse current may damage device. A
N/C 3 No effect if this pin is not used by customer. D
When used to route the SW node to connect CBOOT (as recommended), damage to internal power FETs and other internal circuits. A
BOOT 4 Damage to internal circuits A
VCC 5 Fault mode will shut device off B
AGND 6 No effect D
FB 7 The regulator will operate at maximum duty cycle. Output voltage will rise to nearly the input voltage (VIN) level. Possible damage to customer load and output stage components may occur. No effect on device. B
PG 8 Power good functionality will be lost. B
EN 9 Loss of ENABLE functionality Device will remain in shutdown mode. B
SW 12 Damage to internal power FETs and other internal circuits A
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
PGND 1,11 With either one or both pins open, possible device damage. A
VIN 2,10 With both pins open, there can be loss of output voltage. With one pin open, there can be possible device damage. A
N/C 3 No effect if this pin is not used by customer. D
When used to route the SW node to connect CBOOT (as recommended), the effect is the same as open on pin 4. B
BOOT 4 Loss of output voltage regulation; low or no output voltage. B
VCC 5 VCC LDO will be unstable. Loss of output voltage regulation and possible damage to internal circuits. A
AGND 6 Loss of output voltage regulation. Possible damage to internal circuits. A
FB 7 Loss of output voltage regulation. Output voltage may rise or fall outside of intended regulation window. B
PG 8 PG functionality will be lost. B
EN 9 Loss of ENABLE functionality. Erratic operation; probable loss of regulation. B
SW 12 Loss of output voltage. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
PGND 1 VIN Device will not operate. No output voltage will be generated. Output capacitors will discharge through input short. Large reverse current may damage device. A
VIN 2 N/C No effect if this pin is not used by customer. D
When used to route the SW node to connect CBOOT (as recommended), the output voltage will rise to nearly the level of VIN. Customer load will be damaged. Possible damage to device A
N/C 3 BOOT No effect if this pin is not used by customer. D
When used to route the SW node to connect CBOOT (as recommended), damage to internal circuits. No output voltage will be produced. A
BOOT 4 VCC Loss of output regulation, possible damage to internal circuits A
VCC 5 AGND Fault mode will shut device off B
AGND 6 FB The regulator will operate at maximum duty cycle. Output voltage will rise to nearly the input voltage (VIN) level. Possible damage to customer load and output stage components may occur. No effect on device. B
FB 7 PG Erratic operation; probable loss of regulation. Possible output voltage increase and damage to customer load. B
PG 8 EN Erratic operation; probable loss of regulation. B
EN 9 VIN This is a valid connection for the EN input. Enable functionality will be lost; the device will remain on. B
VIN 10 PGND Device will not operate. No output voltage will be generated. Output capacitors will discharge through input short. Large reverse current may damage device. A
PGND 11 SW Damage to internal power FETs and other internal circuits A
Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
PGND 1,11 Device will not operate. No output voltage will be generated. Output capacitors will discharge through input short. Large reverse current may damage device. A
VIN 2,10 No effect. D
N/C 3 No effect if this pin is not used by customer. D
When used to route the SW node to connect CBOOT (as recommended), the output voltage will rise to nearly the level of VIN. Customer load will be damaged. Possible damage to device A
BOOT 4 Damage to internal circuits A
VCC 5 Damage to internal circuits for VIN > 5.5V A
AGND 6 Possible damage to internal circuits or package A
FB 7 Damage to internal circuits will occur for VIN > 5.5V. A
PG 8 Damage to internal circuits. A
EN 9 No damage to device. Loss of ENABLE functionality. B
SW 12 The output voltage will rise to approximately the level of VIN. Customer load will be damaged. Possible damage to device A