SFFS115 March   2021 DRV8889-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HTSSOP Package
    2. 4.2 QFN Package

1 Overview

This document contains information for DRV8889-Q1 and DRV8889A-Q1 to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

DRV8889-Q1 and DRV8889A-Q1 were developed using a quality-managed development process, but were not developed in accordance with the IEC 61508 or ISO 26262 standards.

Figure 1-1 shows the functional block diagram for the DRV8889-Q1 and DRV8889A-Q1 as a reference.

GUID-6FA8198C-4C1A-4D18-845F-CD52C66F9459-low.gifFigure 1-1 DRV8889/A-Q1 Block Diagram