SFFSAN5 July   2025 UCC25661-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the UCC25661x-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the UCC25661x-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the UCC25661x-Q1 data sheet.

UCC256615-Q1 UCC256614-Q1 UCC256613-Q1 UCC256612-Q1 Pin Diagram Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • The analysis is based on the typical application schematic in the UCC25661x-Q1 data sheet.
  • VCCP is considered as the supply pin.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
HV 1 The device is not biased. No output. B
N/A 2 N/A N/A
BLK 3 No output. B
OVP/OTP 4 The system tries to restart. No output. B
FB 5 The system tries to restart. No output. B
LL 6 The burst-mode function is disabled. C
TSET 7 The system does not start up. B
V5P 8 The system does not start up. B
ISNS 9 Protection triggers. No output. B
GNDP 10 No effect. D
LO 11 The system does not start up. B
VCCP 12 The device is not biased. No output. B
N/A 13 N/A N/A
HB 14 The device is not biased. No output. B
HO 15 Protection triggers. No output. B
HS 16 Half-bridge shoot through; power stage is damaged. No output. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
HV1The device is not biased. No output.B
N/A2N/AN/A
BLK3No output.B
OVP/OTP 4 OVP/OTP loses protections. C
FB 5 Protection triggers. No output. B
LL 6 The burst-mode function is lost. C
TSET 7 The system does not start up. No output. B
V5P 8 The output is not regulated. B
ISNS 9 The system does not start up. B
GNDP 10 The output is not regulated. B
LO 11 No output. B
VCCP 12 No output. B
N/A 13 N/A N/A
HB 14 No output. B
HO 15 The output is not regulated. B
HS 16 Power stage is damaged. No output. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
HV1N/AN/AD
N/A2BLKN/AD
BLK3OVP/OTPThe output is not regulated.B
OVP/OTP 4 FB The output is not regulated. B
FB 5 LL The output is not regulated. B
LL 6 TSET The output is not regulated. B
TSET 7 V5P The system does not start up. B
V5P 8 ISNS N/A D
ISNS 9 GNDP Protection triggers. No output. B
GNDP 10 LO No output. B
LO 11 VCCP No output. B
VCCP 12 N/A N/A D
N/A 13 HB N/A D
HB 14 HO The power stage and device are damaged. A
HO 15 HS No output. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to VCC
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
HV1The system is in normal operation after the HV series resistor is burned.C
N/A 2 N/A D
BLK 3 The output is not regulated. B
OVP/OTP 4 The output is not regulated. B
FB 5 The output is not regulated. B
LL 6 The output is not regulated. B
TSET 7 The output is not regulated. B
V5P 8 The output is not regulated. B
ISNS 9 The device is not biased. No output. B
GNDP 10 The device is not biased. No output. B
LO 11 No output. B
VCCP 12 No impact. D
N/A 13 N/A D
HB 14 The device and system are damaged. A
HO 15 The device and system are damaged. A
HS16The output is not regulated.B