SFFSBF2 June   2026 TPS62810 , TPS62811 , TPS62812 , TPS62813

 

  1.   1
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
  6. 5Revision History

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TPS6281x. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to VIN (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1shows the TPS6281x pin diagram for the VQFN package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS6281x datasheet.

TPS62810 TPS62811 TPS62812 TPS62813 Pin Diagram Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • The device is used according to the typical application, refer to the Simplified Schematics section in the TPS6281x datasheet.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
MODE/SYNC1The device functions as intended.D
VIN2The device does not power up.B
SW3The device is potentially damages.A
GND4There is no effect to the device.D
FB5The output voltage is regulated to VIN (100% mode).B
SS/TR6The device is not functional.B
COMP/FSET7The device functions as intended.D
EN8The device functions as intended.D
PG9The device functions as intended.D
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
MODE/SYNC1The operation of the device is undetermined.B
VIN2The device does not power up.B
SW3The device is not functional, open loop operation.B
GND4The device is not functional.B
FB5The output voltage behavior is undetermined; open loop operation.B
SS/TR6The device functions as intended.D
COMP/FSET7The device functions as intended.D
EN8The operation of the device is undetermined; the device potentially power up or potentially does not power up.B
PG9The device functions as intended.B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
MODE/SYNC1PGThe device runs FPWM mode once the PG pin is high impedance.B
FB5SS/TRThe operation of the device is undetermined, VOUT spikes up to VIN.B
SS/TR6COMP/FSETThe operation of the device is undetermined.B
EN8PGThe device does not power up.B
Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
MODE/SYNC1The device functions as intended: Forced PWM.D
VIN2The device functions as intended.D
SW3The device is potentially damaged.A
GND4The device does not power up.B
FB5The device is potentially damaged.A
SS/TR6The device functions as intended.D
COMP/FSET7The device functions as intended.D
EN8The device functions as intended.D
PG9The device is potentially damaged.A