SLAA513B December   2011  – February 2022 MSP430G2112 , MSP430G2112 , MSP430G2152 , MSP430G2152 , MSP430G2212 , MSP430G2212 , MSP430G2252 , MSP430G2252 , MSP430G2312 , MSP430G2312 , MSP430G2352 , MSP430G2352 , MSP430G2412 , MSP430G2412 , MSP430G2452 , MSP430G2452

 

  1.   Trademarks
  2. 1Typical Single Time Base Method
  3. 2Multiple Time Base Method
  4. 3Implementing the Multiple Time Base Method in a Custom Application
    1. 3.1 Timer Clock Source Selection
    2. 3.2 Period and Frequency Calculation
    3. 3.3 Duty Cycle Calculation
  5. 4Example Code
    1. 4.1 Method
      1. 4.1.1 ISR for Multiple Frequencies
      2. 4.1.2 ISR for Multiple Frequencies and Duty Cycles (PWM)
    2. 4.2 Included Code Examples
  6. 5Limitations of the Multiple Time Base Method
    1. 5.1 ISR Overhead
    2. 5.2 Maximum Output Frequency vs Number of Signals
    3. 5.3 Power Consumption
  7. 6References
  8. 7Revision History

4.2 Included Code Examples

  • multi_freq_g2452_example.c – MSP430G2452 example generating three independent frequencies on a Timer_A module.
  • multi_freq_pwm_g2452_example.c – MSP430G2452 example generating three independent PWMs with different frequencies and duty cycles on a Timer_A module.
  • multi_freq_f5529_example.c – MSP430F5529 example generating seven independent frequencies on a Timer_B module. Makes use of the 5xx/6xx Core Libraries for clock configuration. Outputs are port mapped to Port 4 so signals are accessible on an MSP-EXP430F5529 Experimenter Board.
  • multi_freq_pwm_f5529_example.c – MSP430F5529 example generating seven independent PWMs with different frequencies and duty cycles on a Timer_B module. Makes use of the 5xx/6xx Core Libraries for clock configuration. Outputs are port mapped to Port 4 so signals are accessible on an MSP-EXP430F5529 Experimenter Board.