1 LDMOS and GaN Power Amplifier FET Basics

Most RF antenna systems feature power amplifiers (PA) for their transmitter design. These antenna systems include:

• Active Antenna System mMIMO (AAS)
• Macro Remote Radio Unit (RRU)
• Small Cell Base Stations
• Radar

Power amplifier biasing circuits are implemented in these systems to ensure two things: first, that the power output of the amplifier is known and controlled, and second, that the system is powered on and off safely to reduce the risk of damaging the PA. Power amplifiers are commonly created with either gallium nitride (GaN) or laterally diffused MOSFET (LDMOS) transistors. Power output in both GaN and LDMOS FETs (field-effect transistors) is dependent on the current that flows through the device from the drain to the source (I_DS).

Figure 1-1 GaN and LDMOS FETs

The I_DS current is determined by a few variables: the drain voltage (V_D), the gate voltage (commonly called V_GS), and temperature. Figure 1-2 shows an example of I_DS values against the drain voltage for a selection of V_GS voltages for a GaN FET. The higher V_GS voltages result in a higher I_DS, or more power from the amplifier. When the V_GS voltage is sufficiently low, the FET allows virtually zero I_DS current. This V_GS voltage is called the pinch-off voltage. I_DS is also dependent on the drain voltage, but most designers do not vary the V_D. Instead, designers use optimized V_D voltages for the desired power levels. The V_D values are usually about 50 V for GaN FETs and 28 V for LDMOS FETs.

Figure 1-2 FET V_D, I_DS, and V_GS Behavior