SLAAE23A June   2021  – April 2024 DAC43204 , DAC53002 , DAC53004 , DAC53202 , DAC53204 , DAC53204W , DAC63001 , DAC63002 , DAC63202 , DAC63204 , TPS7A57 , TPS7A94

 

  1.   1
  2.   Design Objective
  3.   Design Description
  4.   Design Notes
  5.   Design Simulations
    1.     Transient Simulation Results
  6.   Register Settings
  7.   Pseudo Code Example
  8.   Design Featured Devices
  9.   Design References

Design Notes

  1. The DACx3204 12-Bit, 10-Bit, and 8-Bit, Quad Voltage and Current Output Smart DACs With Auto-Detected I2C, PMBus™, or SPI Interface Data Sheet recommends using a 100nF decoupling capacitor for the VDD pin and a 1.5µF or greater bypass capacitor for the CAP pin. The CAP pin is connected to the internal LDO. Place these capacitors close to the device pins.
  2. The nominal voltage of the SMPS is set by resistors R1 and R2. The SMPS uses an internal 600mV reference voltage at the FB pin to determine the voltage at the output. Calculate R1 and R2 using the following equations:
    R 1 = V N O M I N A L - V F B I N O M I N A L
    R 2 = R 1 × V F B V N O M I N A L - V F B

    A nominal current of 100µA through R1 and R2 and 3.3V nominal output voltage is used. With these values the equations become:

    R 1 = 3.3 V - 0.6 V 100 µ A = 27 k Ω
    R 2 = 27 k Ω × 0.6 V 3.3 V - 0.6 V = 6 k Ω
  3. To achieve the desired margin, the DAC43204 must sink or source additional current through R1. This current (IMARGIN) is calculated by:
    I M A R G I N = V N O M I N A L × 1 + M A R G I N - V F B R 1 - I N O M I N A L

    For a ±10% margin, the equation becomes:

    I M A R G I N = 3.3 V × 1 + 0.10 - 0.6 V 27 k Ω - 100 µ A = 12 µ A
  4. The DAC codes for ±IMARGIN are stored in the DAC-MARGIN-HIGH and DAC-MARGIN-LOW registers. The codes programmed to these registers, in decimal, is calculated using:
    D A C _ M A R G I N _ H I G H = I D A C , M A X - I M I N I M A X - I M I N × 256
    D A C _ M A R G I N _ L O W = I D A C , M I N - I M I N I M A X - I M I N × 256

    Using an IOUT range of ±25µA, the equation becomes:

    D A C _ M A R G I N _ H I G H = 12 µ A - - 25 µ A 25 µ A - - 25 µ A × 256 = 189.44 d
    D A C _ M A R G I N _ L O W = - 12 µ A - - 25 µ A 25 µ A - - 25 µ A × 256 = 66.56 d

    This is rounded to 189d and 67d to give a IDAC,MAX of 11.9µA and a IDAC,MIN of –11.9µA.

  5. In this design, GPI is used for Margin High, Low function. A high on GPI sets the DAC output to IDAC,MAX and the SMPS VOUT to margin low, or 2.97V. A low on GPI sets the DAC output to IDAC,MIN and the SMPS VOUT to margin high, or 3.63V.
  6. The DAC43204 can be programmed with the initial register settings described in the Register Settings section using I2C or SPI. Save the initial register settings in the NVM by writing a 1 to the NVM-PROG field of the COMMON-TRIGGER register. After programming the NVM, the device loads all registers with the values stored in the NVM after a reset or a power cycle.