SLAAEU9 June   2026 TAS5805M , TAS5825M , TAS5827 , TAS5828M

 

  1.   1
  2.   Abstract
  3. 1Maximum Non-Clipping Voltage Output by Class-D Amplifiers
  4. 2Distortion Introduced at the Analog Stage
    1. 2.1 Clipping Distortion Caused by Low PVDD
    2. 2.2 Distortion Due to Insufficient PVDD Power Supply
    3. 2.3 Distortion Caused by Insufficient Class-H Boosting
    4. 2.4 Clipping Distortion Caused by Cycle-By-Cycle Current Limiting
  5. 3Signal Distortion in the DSP Digital Domain
    1. 3.1 Distortion Caused by Digital Overflow
    2. 3.2 Distortion Caused by Clipper Module Clipping
    3. 3.3 Clipping/Distortion Caused by Incorrect Sample Rate Setting
  6. 4Summary
  7. 5References

3.1 Distortion Caused by Digital Overflow

The TAS58xx is a high-performance digital-input audio power amplifier with an integrated DSP, allowing users to perform tuning, limiting, and other functions within the DSP.

DSP Data Format of TAS58xxFigure 3-1 DSP Data Format of TAS58xx

The above figure shows the flowchart of the TAS58xx series, including modules such as SRC, DRC, EQ, and AGL. Different modules possess different DSP Headrooms, which correspond to different reserved spaces, and these reserved spaces correspond to different digital signal magnitudes. Taking the 9.23 format as an example, 9.23 indicates that within a 32-bit fixed-point number, there is 1 sign bit, 9 integer bits, and 23 fractional bits. The maximum gain corresponding to the 9.23 format is 20 × log M (2^((9-1))) = 48 dB. Similarly, the 5.27 format corresponds to 24 dB, and 1.31 corresponds to 0 dB.

The above Figure 3-1 includes the maximum gain adjustment capability of each functional module itself, as well as the signal magnitude limitations entering that functional module. Taking Volume and DRC as examples, the maximum gain that can be added in Volume is 48 dB, but the data signal entering the DRC cannot exceed 24 dB. Assuming the gains of the Input mixer and EQ are at their default value of 0 dB, and the input signal from the AP is at a maximum of 0 dB, even though the Volume can provide a gain of 48 dB, the gain setting of the Volume should not exceed 24 dB at most to ensure that the signal entering the DRC does not exceed 24 dB. Otherwise, the signal entering the DRC will exceed 24 dB, leading to digital overflow, and the high-order digits of the signal emerging from the DRC will be discarded, causing clipping distortion of the sinusoidal signal.

Measured Example: Under the default configuration of PPC3, the Volume gain of the power amplifier is set to 10 dB, and the Analog gain is set to -10 dB. Utilizing the AP to provide IIS input signals of -9 dB and -10 dB respectively, the output waveforms of SDOUT are as follows. SDOUT is the signal directly output by the power amplifier DSP. When the AP inputs a -9 dB signal and 10 dB is added in Volume, the signal entering the Interpolation becomes +1 dB, causing a digital overflow, which means the signal entering the DAC is already distorted. When the AP inputs a -10 dB signal, it just happens to avoid distortion.

Waveform Comparison of Digital Overflow in AP
a) Distorted Waveform with input = -9dBFigure 3-2 a) Distorted Waveform with input = -9dB
b) Undistorted Waveform with input = -10dBFigure 3-3 b) Undistorted Waveform with input = -10dB