SLASFK2 December   2024 DAC121S101-SEP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 DAC Section
      2. 6.3.2 Resistor String
      3. 6.3.3 Output Amplifier
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power-On Reset
      2. 6.4.2 Power-Down Modes
    5. 6.5 Programming
      1. 6.5.1 Serial Interface
      2. 6.5.2 Input Shift Register
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Bipolar Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.3 Output Amplifier

The output buffer amplifier is a rail-to-rail type, providing an output voltage range of 0V to VA. All amplifiers, even rail-to-rail types, exhibit a loss of linearity as the output approaches the supply rails (0V and VA, in this case). For this reason, linearity is specified over less than the full output range of the DAC. The output capabilities of the amplifier are described in the Electrical Characteristics.