SLAU944 August   2024 TAS2320

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Quick Start Guide
    1. 2.1 TAS2320EVM Setup for Software Mode
    2. 2.2 TAS2320EVM Setup for Hardware Mode
  9. 3Hardware
    1. 3.1  AC-MB Settings
      1. 3.1.1 Audio Serial Interface Settings
      2. 3.1.2 USB Audio AC-MB Settings
      3. 3.1.3 External Audio AC-MB Settings
    2. 3.2  AC-MB Power Supply
    3. 3.3  Default Jumper Setting on TAS2320EVM
    4. 3.4  I2C Target Address Selection
    5. 3.5  IOVDD Power Supply Options
    6. 3.6  AVDD Power Supply Options
    7. 3.7  VBAT Power Supply Options
    8. 3.8  PVDD Power Supply Options
    9. 3.9  IOVDD_BUFF Power Supply Options
    10. 3.10 Speaker Outputs
    11. 3.11 2-Channel Configuration
    12. 3.12 4-Wire Measurement of Load
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Trademarks

3.3 Default Jumper Setting on TAS2320EVM

TAS2320EVM comes setup for Hardware Mode by default. The default jumper settings are shown in TAS2320 Mono Evaluation ModuleSoftware Mode Jumper SettingsHardware Mode Jumper SettingsDefault Jumper Settings in Hardware Mode.

TAS2320EVM Default Jumper Settings in Hardware Mode Figure 3-6 Default Jumper Settings in Hardware Mode

The default positions for all the jumpers on TAS2320EVM is shown in Table 3-3.

Table 3-1 Default Jumper Settings
JumperSettingDescription

SEL1 (J9/J86)

21dBV-RampEn

Short from the middle row to a nearby pin to select one of the gain and ramp enable/disable options.

SEL2 (J10/J87)

TDM0 / I2SL

Short from the middle row to a nearby pin to select one of the channel options.

SEL3 (J78)

Falling Edge

Select SBCLK sampling edge.

SEL4 (J79)

80mW

Select the Y-Bridge Threshold option.

SEL5 (J8/J12)

1S Mode

Select 1S power mode. 2S mode requires special power connections.

IOVDD_BUFF (J40/J43)

IOVDD_MB

Set IOVDD_BUFF rail to be same as IOVDD_MB.

J54

Open

EEPROM Address.

J53

Short

EEPROM WP.

J59

Open

Additional SDA pull-up.

J61

Open

Additional SCL pull-up.

VBAT (U1) (J5)

VIN (J21)

VBAT pin on TAS2320 powered from J21, refer to Section 3.7.

VBAT_SNS (J4)

GND

VBAT_SNS pin connected to GND.

J3

Short

IOVDD powered from IOVDD_MB when shorted, refer to Section 3.5.

J7

Short

AVDD powered from on-board 1.8V LDO when shorted, refer to Section 3.6.

J17

HW Mode

Onboard voltage fixed to 13V.

J20

Short (2 jumper)

Connects on-board boost output to PVDD, refer to Section 3.8.

J1

VIN (J21)

Onboard boost source selection.