SLAZ145I October   2012  – May 2021 MSP430F1610

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RTD64
      2.      PM64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC18
    2. 6.2  ADC25
    3. 6.3  BCL5
    4. 6.4  CPU4
    5. 6.5  CPU41
    6. 6.6  DAC4
    7. 6.7  I2C7
    8. 6.8  I2C8
    9. 6.9  I2C9
    10. 6.10 I2C10
    11. 6.11 I2C11
    12. 6.12 I2C12
    13. 6.13 I2C13
    14. 6.14 I2C14
    15. 6.15 I2C15
    16. 6.16 I2C16
    17. 6.17 MPY2
    18. 6.18 TA12
    19. 6.19 TA16
    20. 6.20 TA21
    21. 6.21 TAB22
    22. 6.22 TB2
    23. 6.23 TB16
    24. 6.24 TB24
    25. 6.25 US14
    26. 6.26 US15
    27. 6.27 WDG2
  7. 7Revision History

4 Fixed by Compiler Advisories

Advisories that are resolved by compiler workaround. Refer to each advisory for the IDE and compiler versions with a workaround.

✓ The check mark indicates that the issue is present in the specified revision.

Errata NumberRev BRev A
CPU4✓✓

Refer to the following MSP430 compiler documentation for more details about the CPU bugs workarounds.

TI MSP430 Compiler Tools (Code Composer Studio IDE)

MSP430 GNU Compiler (MSP430-GCC)

IAR Embedded Workbench