SLAZ625W August   2014  – May 2021 MSP430FR2033

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      DGG48
      2.      DGG56
      3.      PM64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC39
    2. 6.2  ADC50
    3. 6.3  ADC63
    4. 6.4  CPU21
    5. 6.5  CPU22
    6. 6.6  CPU40
    7. 6.7  CPU46
    8. 6.8  CS11
    9. 6.9  CS13
    10. 6.10 EEM23
    11. 6.11 EEM28
    12. 6.12 EEM30
    13. 6.13 GC1
    14. 6.14 GC4
    15. 6.15 GC5
    16. 6.16 PMM32
    17. 6.17 PORT28
    18. 6.18 RTC15
    19. 6.19 SYS23
    20. 6.20 USCI41
    21. 6.21 USCI42
    22. 6.22 USCI45
    23. 6.23 USCI47
    24. 6.24 USCI50
  7. 7Revision History

6.14 GC4

GC Module

Category

Functional

Function

Unexpected PUC is triggered

Description

During execution from FRAM a non-existent uncorrectable bit error can be detected and trigger a PUC if the uncorrectable bit error detection flag is set (GCCTL0.UBDRSTEN = 1). This behavior appears only if:

(1) MCLK is sourced from DCO frequency of 16 MHz

OR

(2) MCLK is sourced by external high frequency clock above 12 MHz at pin HFXIN

OR

(3) MCLK is sourced by High-Frequency crystals (HFXT) above 12 MHz.  

This PUC will not be recognized by the SYSRSTIV register (SYSRSTIV = 0x00).
A PUC RESET will be executed with not defined reset source.
Also the corresponding bit error detection flag is not set  (GCCTL1.UBDIFG = 0).

Workaround

1. Check the reset source for SYSRSTIV = 0 and ignore the reset.

OR

2. Set GCCTL0.UBDRSTEN = 0 to prevent unexpected PUC. NMI event will not be triggered, even if GCCTL0.UBDIE = 1 -> consider GC1 Errata for more details.

OR

3. Set the MCLK to maximum 12MHz to leverage the uncorrectable bit error PUC feature.