SLCS016B September   1985  – June 2025 TLC352

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Description
  4. 3Pin Configuration and Functions
  5. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Electrical Characteristics
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics
  6. 5Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input
      2. 6.4.2 ESD Protection
      3. 6.4.3 Unused Inputs
      4. 6.4.4 Open-Drain Output
      5. 6.4.5 Hysteresis
        1. 6.4.5.1 Inverting Comparator With Hysteresis
        2. 6.4.5.2 Non-Inverting Comparator With Hysteresis
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

ESD Protection

The TLC3x2 input and output ESD protection contains a conventional diode-type "upper" ESD clamp between the I/O pins and V+, and a "lower" ESD clamp between the I/O pins and V-. The inputs or output must not exceed the supply rails by more than 300mV. TI does not recommend applying signals to the inputs with no supply voltage.

When the inputs are connected to a low impedance source, such as a power supply or buffered reference line, add a current-limiting resistor in series with the input to limit any currents when the clamps conduct. The current must be limited 10mA or less, though TI recommends limitng the current to 1mA or less. This series resistance can be part of any resistive input dividers or networks.