9 Revision History
Changes from Revision F (December 2024) to Revision G (August 2026)
- Updated legacy and new chip information throughout the
documentGo
- Removed output voltage range of the legacy chip from the
Features sectionGo
- Changed the input regulation per input voltage change from 0.01% to
0.007% in the Features section to reflect new chip (CSO: RFB)
specsGo
- Changed the typical ripple rejection at 120Hz spec from 80dB to
71.5dB in the Features section to reflect new chip (CSO: RFB)
specsGo
- Removed ripple rejection at 100kHz spec from the Features
sectionGo
- Added device package options to the Features
sectionGo
- Updated Applications sectionGo
- Updated the Description section to reflect new chip (CSO: RFB)
specsGo
- Changed output voltage maximum from 32V to 37V in the
Description section to reflect new chip (CSO: RFB)
specsGo
- Added new chip (CSO: RFB) specs to the Absolute Maximum RatingsGo
- Added new chip (CSO: RFB) specs to the ESD RatingsGo
- Added new chip (CSO: RFB) specs to the Recommended Operating ConditionsGo
- Added new chip (CSO: RFB) specs to the Thermal InformationGo
- Updated Thermal Information to two tables for clarityGo
- Added new chip (CSO: RFB) specs to the Electrical CharacteristicsGo
- Updated titles of Typical Characteristics graphs for legacy
chip (CSO: SHE & CSO: TID)Go
- Added Typical Characteristics graphs for new chip (CSO:
RFB)Go
- Updated Overview section to reflect new chip (CSO: RFB)
specsGo
- Removed mention of specific output voltage range and bias current in
the Overview section, instead added a reference the Electrical
Characteristics table, where the specs can be foundGo
- Updated NPN Darlington Output Drive with link to the
Recommended Operating Conditions
Go
- Updated Operation With Low Input Voltage with a link to the
Recommended Operating Conditions
Go
- Updated Operation at Light Loads with a link to the
Electrical Characteristics
Go
- Updated Operation in Self Protection for
clarityGo
- Updated the maximum input range example value from 32V to 37V in the
Design Requirements to reflect new chip (CSO: RFB)
specsGo
- Updated Adjustment Terminal Capacitor section to mention
CADJ
Go
- Updated
adjustment current from 50µA to 44µA in the Output Voltage section to
reflect new chip (CSO: RFB) specsGo
- Changed position of Input Short Protection to before Ripple Rejection
within the Detailed Design
Procedure
Go
- Updated Ripple Rejection with a link to the Adjustment
Terminal Capacitor sectionGo
- Updated Application Curve to specify legacy chip performanceGo
- Added note to 0V to 30V Regulator Circuit
Go
- Added note to Slow-Turn On 15V Regulator
Circuit
Go
- Added note to Current-Limited 6V Charger
Go
- Added note to High-Current Adjustable
Regulator
Go
- Updated the maximum input voltage from 32V to 37V in the Power
Supply Recommendations section to reflect new chip (CSO: RFB)
specsGo
- Added a link to the Recommended Operating Conditions table in
the Power Supply Recommendations sectionGo
- Updated Layout Guidelines to give more detailed guidance
about capacitor placementGo
- Added SOIC layouts to the Layout Example
sectionGo
- Updated the Device Nomenclature for clarity, included distinction based on
CSOGo
Changes from Revision E (October 2014) to Revision F (December 2024)
- Updated the numbering format for tables, figures, and
cross-references throughout the documentGo
- Added terminology to identify legacy and new chip information
throughout documentGo
- Updated Pin Functions table to include correct pin informationGo
- Added Device Support sectionGo