SLDU040 November   2022 LP5891

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  4. 2Function Descriptions
  5. 3Test Setup
    1. 3.1 System/Tool Requirements
    2. 3.2 Software Setup
    3. 3.3 Hardware Setup for Single Device
    4. 3.4 Hardware Setup for Dual Cascaded Devices
  6. 4Additional Resources
  7. 5Schematic
  8. 6Layout
  9. 7Bill of Materials

6 Layout

The PCB layout of the EVM is shown below.

GUID-20220906-SS0I-RPVT-ZBDZ-CPLD4FDRWG3P-low.gifFigure 6-1 LP5891EVM Top Layer
GUID-20220906-SS0I-QK8X-S8VQ-C72SRBGVCN20-low.gifFigure 6-3 LP5891EVM Signal Layer 2
GUID-20220906-SS0I-9MQ1-KL2W-0J9BX2XJ1747-low.gifFigure 6-2 LP5891EVM Signal Layer 1
GUID-20220906-SS0I-JLJR-KBBW-TCJD1PH8XFH7-low.gifFigure 6-4 LP5891EVM Bottom Layer