SLLA604 December   2022 TUSB1004 , TUSB1142

 

  1.   Abstract
  2.   Trademarks
  3. 1Schematic Checklist for TUSB1004 and TUSB1142
  4. 2References

Schematic Checklist for TUSB1004 and TUSB1142

Table 1-1 Schematic Checklist (1)
Pin Name

TUSB1004


Pin Number

TUSB1142


Pin Number
Pin Description Recommendation

CTX1P

34

33

Differential positive output for USB port 1 Should be connected to SSTXn pin of USB connector through an external 220 nF AC-coupling capacitor.

CTX1N

33

34 Differential negative output for USB port 1 Should be connected to SSTXn pin of USB connector through an external 220 nF AC-coupling capacitor.

CRX1P

31

30 Differential positive input for USB port 1 Should be connected to RX1p pin of USB connector. Connection can be DC-coupled to USB connector, Or with external 330 nF capacitor

CRX1N

30 31 Differential negative input for USB port 1 Should be connected to RX1n pin of USB connector. Connection can be DC-coupled to USB connector, Or with external 330 nF capacitor

CTX2P

40

40 Differential positive output for USB port

2

Should be connected to SSTXn pin of USB connector through an external 220 nF AC-coupling capacitor.
CTX2N 39

39

Differential negative output for USB port

2

Should be connected to SSTXn pin of USB connector through an external 220 nF AC-coupling capacitor.
CRX2P

37

37

Differential positive input for USB port

2

Should be connected to RX2p pin of USB connector. Connection can be DC-coupled to USB connector, Or with external 330 nF capacitor
CRX2N

36

36 Differential negative input for USB port

2

Should be connected to RX2n pin of USB connector. Connection can be DC-coupled to USB connector, Or with external 330 nF capacitor

SSTX1P

15

Differential positive input for USB port 1 Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor

SSTX1N

16

Differential negative input for USB port 1 Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor

SSRX1P

18

Differential positive output for USB port 1 Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor

SSRX1N

19 Differential negative output for USB port 1 Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor

SSTX2P

9

Differential positive input for USB port

2

Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor
SSTX2N 10 Differential negative input for USB port

2

Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor
SSRX2P 12 Differential positive output for USB port

2

Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor
SSRX2N 13 Differential negative output for USB port

2

Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor
SSTXP 16 Differential positive input for USB port Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor
SSTXN 15 Differential negative input for USB port Should be connected to USB 3.2 Host transmit port through an external 220 nF AC-coupling capacitor
SSRXP 19 Differential positive output for USB port Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor

SSRXN

18 Differential negative output for USB port Should be connected to USB 3.2 Host receiver port through an external 220 nF AC-coupling capacitor
SSEQ1/A1

2

2

In I2C mode, this pin along with A0 pin selects the 7-bit I2C target address . In pin-strap mode, this pin along with SSEQ0 selects the receiver EQ for SSTX1 and /or SSTX2
SSEQ0/A0 35

35

In I2C mode, this pin along with A1 pin selects the 7-bit I2C target address . In pin-strap mode, this pin along with SSEQ1 selects the receiver EQ for SSTX1and/or SSTX2
EQCFG 3

3

In pin-strap mode, this controls how CEQ[1:0] pins and SSEQ[1:0] are used. In I2C mode, this pin is for TI internal test and must be left floating for normal operation

SLP_S0#

4

4

Rx.Detect function 1: Rx.Detect Enabled. 0: Rx.Detect Disabled
TESTOUT1 7

7

TI

internal use

Floating
TESTOUT2 8

8

TI

Internal use

Floating
VIO_SEL 14

14

Selects the input thresholds for I2C "0": I2C 3.3 V "R": I2C 1.8 V "F": I2C 3.3 V. "1": I2C 1.8 V.
MODE 17

17

Mode

select

"0": pin strap "R":Reserved "F": I2C "1": reserved.
SCL/TEST2 21 I2C

Clock in I2C

In pin strap:

Pulldown

For normal operation

SCL/FLIP

21

I2C

Clock in I2C

In pin-strap mode, this pin controls the orientation of the MUX
SDA/AEQENZ 22

22

I2C

Data in I2C

In pin strap:

0: AEQ enabled. 1: AEQ disabled
AEQCFG 23

23

FULLAEQ_UPPER_EQ limit In I2C: "0": FULLAEQ_UPPER_EQ = Ah "R": FULLAEQ_UPPER_EQ = Fh "F": FULLAEQ_UPPER_EQ = 8h "1": FULLAEQ_UPPER_EQ = Ch
EN 26

26

Device

enable

"0": device disable "1":device enable

TEST1 27

TI internal use

Connect

to VCC

TEST1

27

TI internal use

Connect to Gnd

CEQ0

38

38

In pin-strap mode, this pin along with CEQ1 selects the receiver EQ for CRX1 and/or CRX2
CEQ1 29

29

In pin-strap mode, this pin along with CEQ0 selects the receiver EQ for CRX1 and/or CRX2
VCC 1,6,20,28 1,6,20,28 3.3V supply

Connect to 3.3v supply

Thermal Pad Ground Connect to a solid ground plane.
NC 5,11,24,25,32 5,11,24,25,32 No internal connection

Floating

RSVD1 9 Reserved Leave pin unconnected
RSVD2 10 Reserved Leave pin unconnected
RSVD3 12 Reserved Leave pin unconnected

RSVD4

13 Reserved Leave pin unconnected
All 4-level inputs are latched after the rising edge of EN pin. After these pins are sampled, the internalpull-up and pull-down resistors will be isolated in order to save pow.