SLLSEK3F July   2015  – June 2026 TUSB4041I

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 3.3V I/O Electrical Characteristics
    6. 5.6 Power-Up Timing Requirements
    7. 5.7 Hub Input Supply Current
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Battery Charging Features
      2. 6.3.2 USB Power Management
      3. 6.3.3 One-Time Programmable Configuration
      4. 6.3.4 Clock Generation
      5. 6.3.5 Crystal Requirements
      6. 6.3.6 Input Clock Requirements
      7. 6.3.7 Power-Up and Reset
    4. 6.4 Device Functional Modes
      1. 6.4.1 External Configuration Interface
      2. 6.4.2 I2C EEPROM Operation
      3. 6.4.3 SMBus Target Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Upstream Port Implementation
        2. 7.2.2.2 Downstream Port 1 Implementation
        3. 7.2.2.3 Downstream Port 2 Implementation
        4. 7.2.2.4 Downstream Port 3 Implementation
        5. 7.2.2.5 Downstream Port 4 Implementation
        6. 7.2.2.6 VBUS Power Switch Implementation
        7. 7.2.2.7 Clock, Reset, and Miscellaneous
        8. 7.2.2.8 TUSB4041I Power Implementation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 TUSB4041I Power Supply
      2. 7.3.2 Downstream Port Power
      3. 7.3.3 Ground
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Placement
        2. 7.4.1.2 Package Specific
        3. 7.4.1.3 Differential Pairs
      2. 7.4.2 Layout Example
  9. 8 Register Maps
    1. 8.1  Configuration Registers
    2. 8.2  ROM Signature Register
    3. 8.3  Vendor ID LSB Register
    4. 8.4  Vendor ID MSB Register
    5. 8.5  Product ID LSB Register
    6. 8.6  Product ID MSB Register
    7. 8.7  Device Configuration Register
    8. 8.8  Battery Charging Support Register
    9. 8.9  Device Removable Configuration Register
    10. 8.10 Port Used Configuration Register
    11. 8.11 Device Configuration Register 2
    12. 8.12 USB 2.0 Port Polarity Control Register
    13. 8.13 UUID Byte N Register
    14. 8.14 Language ID LSB Register
    15. 8.15 Language ID MSB Register
    16. 8.16 Serial Number String Length Register
    17. 8.17 Manufacturer String Length Register
    18. 8.18 Product String Length Register
    19. 8.19 Serial Number String Registers
    20. 8.20 Manufacturer String Registers
    21. 8.21 Product String Byte N Register
    22. 8.22 Additional Feature Configuration Register
    23. 8.23 Device Status and Command Register
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

10 Revision History

Changes from Revision E (September 2017) to Revision F (June 2026)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Changed all instances of legacy terminology to controller and target where I2C is mentioned.Go
  • Updated Global Reset Mode current in Hub Input Supply Current Go

Changes from Revision D (July 2017) to Revision E (September 2017)

  • Changed smbusRst From: Bit 6 To: Bit 1, and cfgActive1 From: Bit 5 To: Bit 0 Table 8-23 Go

Changes from Revision C (September 2016) to Revision D (July 2017)

  • Deleted paragraph: "Each bit corresponds directly to a downstream port. For example: used0 corresponds to downstream port 1, used1 corresponds to downstream port 2, and so on. All combinations are supported with the exception of both ports 1 and 3 marked as disabled." from Table 8-10 Go

Changes from Revision B (December 2015) to Revision C (September 2016)

  • Added maximum junction temperature to the Absolute Maximum Ratings tableGo
  • Added NOTE to the SMBus Target Operation section Go
  • Added text "This device will always report the XORed PID LSB value of 0x42" to the Description of Table 8-5 Go

Changes from Revision A (September 2015) to Revision B (December 2015)

  • Changed the configuration of the PWRCTL_POL pin (R17) in the Clock, Reset, and Miscellaneous sectionGo

Changes from Revision * (July 2015) to Revision A (September 2015)

  • Changed pin number for USB_DP_DN1 and USB_DP_DN2 in the Pin Functions table Go