SLUAAM4 December   2023 BQ76905 , BQ76907

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Direct Commands
    1. 1.1 Alarm Enable - 0x66
    2. 1.2 Cell 1 Voltage - 0x14
    3. 1.3 Internal Temperature - 0x28
    4. 1.4 CC2 Current - 0x3A
    5. 1.5 Direct Command Summary
      1. 1.5.1 Disabling Auto Refresh
  5. 2Subcommands
    1. 2.1 DEVICE_NUMBER - 0x0001
    2. 2.2 FET_ENABLE - 0x0022
    3. 2.3 RESET - 0x0012
    4. 2.4 CB_ACTIVE_CELLS - 0x0083
    5. 2.5 Subcommand Summary
  6. 3Reading and Writing RAM Registers
    1. 3.1 Read Enabled Protections A
    2. 3.2 Enter CONFIG_UPDATE Mode
    3. 3.3 Write Enabled Protections A
    4. 3.4 Write VCell Mode
    5. 3.5 Exit CONFIG_UPDATE Mode
    6. 3.6 Reading and Writing RAM Registers Summary
  7. 4I2C With CRC
  8. 5Simple Code Examples
  9. 6References

3.4 Write VCell Mode

Next, write to the VCell Mode register shown in Table 3-3 to configure the device BQ76905 for 4 cells. The following example writes 0x04 to 0x901B and then writes the new checksum and length to 0x60/0x61 as seen in Figure 3-4.

Table 3-3 VCell Mode Description
ClassSubclassNameTypeMinMaxDefaultUnit
SettingsConfigurationVCell ModeH20x00000xFFFF0x0000Hex
GUID-20220822-SS0I-NR8Q-CXMR-J8HVRD5CMBVP-low.pngFigure 3-4 Captured I2C Waveform for Writing VCell Mode