SLUS161G
April 1999 – April 2025
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Detailed Pin Descriptions
7.3.1.1
COMP
7.3.1.2
CS
7.3.1.3
FB
7.3.1.4
GND
7.3.1.5
OUT
7.3.1.6
RC
7.3.1.7
REF
7.3.1.8
VCC
7.3.2
Undervoltage Lockout (UVLO)
7.3.3
Self-Biasing, Active Low Output
7.3.4
Reference Voltage
7.3.5
Oscillator
7.3.6
Synchronization
7.3.7
PWM Generator
7.3.8
Minimum Off-Time Adjustment (Dead-Time Control)
7.3.9
Leading Edge Blanking
7.3.10
Minimum Pulse Width
7.3.11
Current Limiting
7.3.12
Overcurrent Protection and Full-Cycle Restart
7.3.13
Soft Start
7.3.14
Slope Compensation
7.4
Device Functional Modes
7.4.1
Normal Operation
7.4.2
UVLO Mode
7.4.3
Soft-Start Mode
7.4.4
Fault Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Bulk Capacitor Calculation
8.2.2.2
Transformer Design
8.2.2.3
MOSFET and Output Diode Selection
8.2.2.4
Output Capacitor Calculation
8.2.2.5
Current Sensing Network
8.2.2.6
Gate Drive Resistor
8.2.2.7
REF Bypass Capacitor
8.2.2.8
RT and CT
8.2.2.9
Start-Up Circuit
8.2.2.10
Voltage Feedback Compensation Procedure
8.2.2.10.1
Power Stage Gain, Zeroes, and Poles
8.2.2.10.2
Compensating the Loop
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Related Links
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
9.1
Documentation Support