SLUS714E January   2007  – June 2019 TPS40077

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Minimum Pulse Duration
      2. 7.3.2  Slew Rate Limit On VDD
      3. 7.3.3  Setting The Switching Frequency (Programming The Clock Oscillator)
      4. 7.3.4  Loop Compensation
      5. 7.3.5  Shutdown and Sequencing
      6. 7.3.6  Boost and LVBP Bypass Capacitance
      7. 7.3.7  Internal Regulators
      8. 7.3.8  Power Dissipation
      9. 7.3.9  Boost Diode
      10. 7.3.10 Synchronous Rectifier Control
    4. 7.4 Programming
      1. 7.4.1 Programming The Ramp Generator Circuit and UVLO
      2. 7.4.2 Programming Soft Start
      3. 7.4.3 Programming Short-Circuit Protection
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Regulator 8-V to 16-V Input, 1.8-V Output at 10 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Train Components
            1. 8.2.1.2.1.1  Output Inductor, LOUT
            2. 8.2.1.2.1.2  Output Capacitor, COUT, ELCO and MLCC
            3. 8.2.1.2.1.3  Input Capacitor, CIN ELCO and MLCC
            4. 8.2.1.2.1.4  Switching MOSFET, QSW
            5. 8.2.1.2.1.5  Rectifier MOSFET, QSR
            6. 8.2.1.2.1.6  Timing Resistor, RT
            7. 8.2.1.2.1.7  Feed-Forward and UVLO Resistor, RKFF
            8. 8.2.1.2.1.8  Soft-Start Capacitor, CSS
            9. 8.2.1.2.1.9  Short-Circuit Protection, RILIM and CILIM
            10. 8.2.1.2.1.10 Boost Voltage, CBOOST and DBOOST (Optional)
            11. 8.2.1.2.1.11 Closing the Feedback Loop, RZ1, RP1, RPZ2, RSET1, RSET2, CZ2, CP2, and CPZ1
        3. 8.2.1.3 Application Curves
    3. 8.3 Additional System Examples
  9. Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Programming Soft Start

TPS40077 uses a closed-loop approach to ensure a controlled ramp on the output during start-up. Soft start is programmed by connecting an external capacitor (CSS) from the SS pin to GND. This capacitor is charged by a fixed current, generating a ramp signal. The voltage on SS is level-shifted down approximately 1 V and fed into a separate noninverting input to the error amplifier. The loop is closed on the lower of the level-shifted SS voltage or the 700-mV internal reference voltage. Once the level-shifted SS voltage rises above the internal reference voltage, output-voltage regulation is based on the internal reference. To ensure a controlled ramp-up of the output voltage, the soft-start time should be greater than the L-COUT time constant or Equation 11.

Equation 11. TPS40077 q_tstart02_lus582.gif

Note that there is a direct correlation between tSTART and the input current required during start-up. The lower tSTART is, the higher the input current required during start-up, because the output capacitance must be charged faster. For a desired soft-start time, the soft-start capacitance, CSS, can be found from Equation 12.

Equation 12. TPS40077 css_lus676.gif