SLUS892D December   2009  – December 2019 BQ24610 , BQ24617

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Battery Voltage Regulation
      2. 9.3.2  Battery Current Regulation
      3. 9.3.3  Input Adapter Current Regulation
      4. 9.3.4  Precharge
      5. 9.3.5  Charge Termination, Recharge, and Safety Timer
      6. 9.3.6  Power Up
      7. 9.3.7  Enable and Disable Charging
      8. 9.3.8  System Power Selector
      9. 9.3.9  Automatic Internal Soft-Start Charger Current
      10. 9.3.10 Converter Operation
      11. 9.3.11 Synchronous and Nonsynchronous Operation
      12. 9.3.12 Cycle-by-Cycle Charge Undercurrent Protection
      13. 9.3.13 Input Overvoltage Protection (ACOV)
      14. 9.3.14 Input Undervoltage Lockout (UVLO)
      15. 9.3.15 Battery Overvoltage Protection
      16. 9.3.16 Cycle-by-Cycle Charge Overcurrent Protection
      17. 9.3.17 Thermal Shutdown Protection
      18. 9.3.18 Temperature Qualification
      19. 9.3.19 Timer Fault Recovery
      20. 9.3.20 PG Output
      21. 9.3.21 CE (Charge Enable)
      22. 9.3.22 Charge Status Outputs
      23. 9.3.23 Battery Detection
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 System with Power Path
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Inductor Selection
          2. 10.2.1.2.2 Input Capacitor
          3. 10.2.1.2.3 Output Capacitor
          4. 10.2.1.2.4 Power MOSFETs Selection
          5. 10.2.1.2.5 Input Filter Design
          6. 10.2.1.2.6 Inductor, Capacitor, and Sense Resistor Selection Guidelines
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Simplified System without Power Path or DPM
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
      3. 10.2.3 Lead-Acid Charging System
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

10.2.1.2.4 Power MOSFETs Selection

Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30-V or higher-voltage rating MOSFETs are preferred for 20-V input voltage and 40-V or higher-rating MOSFETs are preferred for 20-V to 28-V input voltage.

Figure-of-merit (FOM) is usually used for selecting the proper MOSFET based on a tradeoff between the conduction loss and switching loss. For a top-side MOSFET, FOM is defined as the product of the MOSFET ON-resistance, rDS(on), and the gate-to-drain charge, QGD. For a bottom-side MOSFET, FOM is defined as the product of the MOSFET ON-resistance, rDS(on), and the total gate charge, QG.

Equation 17. BQ24610 BQ24617 EQ10_FOM_lus875.gif

The lower the FOM value, the lower the total power loss. Usually lower rDS(on) has higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D = VOUT/VIN), charging current (ICHG), the MOSFET ON-resistance tDS(on)), input voltage (VIN), switching frequency (fS), turnon time (ton) and turnoff time (toff):

Equation 18. BQ24610 BQ24617 EQ11_Ptop_lus875.gif

The first item represents the conduction loss. Usually MOSFET rDS(on) increases by 50% with 100ºC junction temperature rise. The second term represents the switching loss. The MOSFET turnon and turnoff times are given by:

Equation 19. BQ24610 BQ24617 EQ12_ton_lus875.gif

where

  • Qsw is the switching charge.
  • Ion is the turnon gate-driving current.
  • Ioff is the turnoff gate driving current.

If the switching charge is not given in the MOSFET data sheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):

Equation 20. BQ24610 BQ24617 EQ13_QSW_lus875.gif

Total gate-driving current can be estimated by the REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turnon gate resistance (Ron), and turnoff gate resistance (Roff) of the gate driver:

Equation 21. BQ24610 BQ24617 EQ14_Ion_lus875.gif

The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous CCM:

Equation 22. BQ24610 BQ24617 EQ15_Pbott_lus875.gif

If the SRP-SRN voltage decreases below 5 mV (the charger is also forced into nonsynchronous mode when the average SRP-SRN voltage is lower than 1.25 mV), the low-side FET is turned off for the remainder of the switching cycle to prevent negative inductor current.

As a result, all the freewheeling current goes through the body diode of the bottom-side MOSFET. The maximum charging current in nonsynchronous mode can be up to 0.9 A (0.5 A typical) for a 10-mΩ charging-current sensing resistor, considering IC tolerance. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum nonsynchronous-mode charging current.

MOSFET gate-driver power loss contributes to the dominant losses on the controller IC when the buck converter is switching. Choosing the MOSFET with a small Qg_total reduces the IC power loss to avoid thermal shutdown.

Equation 23. BQ24610 BQ24617 eqad2_IC_lus892.gif

where

  • Qg_total is the total gate charge for both upper and lower MOSFETs at 6-V VREGN.